Find fanin and fanout of a pin

How to get the driver of an input pin and the fanout of an output pin with Verilog::Perl?

Thanks

Replies (3)

RE: Find fanin and fanout of a pin - Added by Wilson Snyder 6 months ago

Verilog-Perl unfortunately doesn't presently interconnect things, so you need to loop over all cells' pins, and assignments to look for the signal name. (Or more efficiently build a hash for every signal while walking all cell pins, then check the hash)

RE: Find fanin and fanout of a pin - Added by Salem Boudjelel 6 months ago

Thanks for your quick response. Could you give me an example?

RE: Find fanin and fanout of a pin - Added by Wilson Snyder 6 months ago

Attached is a snippet from another program, this won't run as is but you get the idea.

fanout.pl (2.1 kB)

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