Reg: generate - endgenerate constructs.
Added by Prabhu Kamalanathan about 2 years ago
Hi,
This Verilog Parser will it support the generate-endgenerate constructs?
Thanks & Regards,
Prabhu K
Replies (3)
RE: Reg: generate - endgenerate constructs. - Added by Wilson Snyder about 2 years ago
Please read the documentation. The parser supports SystemVerilog 2005.
RE: Reg: generate - endgenerate constructs. - Added by Prabhu Kamalanathan about 2 years ago
Hi,
I agree with you. While I am trying to get the hierarchical path of particular Flip-Flop the hierarchical path is not w.r.t generate - endgenerate constructs.
Thanks & Regards, Prabhu K
RE: Reg: generate - endgenerate constructs. - Added by Prabhu Kamalanathan about 2 years ago
I agree with you. While I am trying to get the hierarchical path of particular Flip-Flop the hierarchical path is incorrect w.r.t generate - endgenerate constructs.
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