Verilator

I'm running into a problem connecting bidirectional pins to slices of a bus. The following code shows the problem:

module moda(inout wire [4:0] d);
endmodule

module modb(inout wire [4:0] d);
endmodule

module top;
    wire [9:0] d;

    moda a0(.d(d[4:0]));
    modb b0(.d(d[4:0]));

    moda a1(.d(d[9:5]));
    modb b1(.d(d[9:5]));
endmodule

I get the message "Unsupported: Tristate pin not connected to simple net". Can anyone suggest workarounds?

(This example is substantially simplified. I actually want to instantiate moda and modb inside a generate statement with a loop. The number of iterations through the loop and the width of the bus d depend on a parameter.)