[logo] 
 
Home
News
Activity
About/Contact
Major Tools
  Dinotrace
  Verilator
  Verilog-mode
  Verilog-Perl
Other Tools
  BugVise
  CovVise
  Force-Gate-Sim
  Gspice
  IPC::Locker
  Rsvn
  Schedule::Load
  SVN::S4
  Synopsys-modes
  SystemPerl
  Verilog-Pli
  Voneline
  Vregs
General Info
  Papers

Tracing back a Segmentation Fault

Added by Mike Denio 7 months ago

I ran a design through Verilator, and the resulting code gets a segmentation fault. The reason is that in the function "traceFullThis__1()" in "Vtb__Trace__Slow.cpp", the following line of code is generated: "vcdp->fullArray(c+46430,(0),256);"

The function fullArray() is not expecting a NULL pointer. Does anyone have any ideas on how I can correlate this line of code to a verilog signal name? The file is almost 300,000 lines of code. I'm suppressing a lot of RTL warnings, so I imagine it is something in the verilog that is causing this, but I don't know how to trace it back.

Thanks, Mike


Replies (2)

RE: Tracing back a Segmentation Fault - Added by Wilson Snyder 7 months ago

The easiest way is to find the declArray(c+46430) and see what the name is.

Alternatively run with --debug, then look at the obj_dir/*final*.tree file. In there you'll find a reference to a TRACE with an identifier of 46430. Then grep the TRACEs pointer (0x#####) in other tree files and you'll almost certainly find at one point that there was a signal attached, but it then got mis-converted to a zero probably by constant propagation.

More details are in the "tree" section of the internals document in the kit.

RE: Tracing back a Segmentation Fault - Added by Mike Denio 7 months ago

Thanks for the help on this. I didn't see the entry in the *final.tree file, and I was never able to create a simplified test case that reproduced the issue, but the good news is that it doesn't occur in the latest release (3.823). Mike

(1-2/2)