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Does Verilator do short-circuit expression evaluation?

Added by R. Diez 5 months ago

Hi all:

I just got bitten by the apparent lack of short-circuit expression evaluation in Verilator. This is the affected statement:

if ( byte_count_left >= 4 && 0 != ethernet_dpi_add_byte_to_tx_frame( obj, m_wb_dat_i[  7:0  ] ) )
  begin
    $display( "%sError appending a byte to the tx Ethernet frame.", `ETHDPI_ERROR_PREFIX );
    $finish;
  end;

The DPI function ethernet_dpi_add_byte_to_tx_frame() gets called even if byte_count_left is less than 4.

I could not confirm whether Verilator supports short-circuit evaluation. I even added the "-sv" flag to enable SystemVerilog parsing, but that had no effect. In SystemVerilog, short-circuit evaluation is a must.

I found issue #413 here, which is somewhat related http://www.veripool.org/issues/413-Verilator-generate-conditional-with-short-circuited-local-expression but I still could not tell if this is a general issue for all other types of expressions.

Thanks, R. Diez


Replies (1)

RE: Does Verilator do short-circuit expression evaluation? - Added by Wilson Snyder 5 months ago

Short circuiting hasn't been implemented yet, Verilator converts && to & when it feels like it's faster as a leftover from V1995 days. Please file another bug and crossref bug413, which should be dependent on the new one (the warning in bug413 is harder to fix.)

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