Verilog-Perl

Verilog-Perl uses Bison as its parser generator. If you've never written a grammar before, you might want to look at a Bison manual ("info bison").

1. Verilog-Perl makes one minor extension in that you can declare the type right at a rule, for example:

funcRef<str>:
        idDotted '(' exprList ')'        { $1+"("+$3+")" }
    ;

The <str> means that this rule returns a "str" (string). In normal Bison you'd need another line to declare that at the top of the file, which is error prone.

2. Most of the grammar rules in VParseBison.y predate the IEEE specification, so their names won't match the IEEE spec appendix A. For new rules, try to name the rule the same as in the IEEE spec, or if it's not a one-to-one match, add a "// IEEE: ..." comment noting how they correspond.

3. Alas it's not as simple as copying the rules from the IEEE spec. Bison is a real implementation versus the psudo-syntax in the spec, so you need to fix recursion and "shift-reduce" conflicts.

If the IEEE spec says "rule: [subrule1] subrule2" indicating subrule1 is optional then you need to either:

   rule:  subrule1 subrule2
        |          subrule2

or

   rule:  subrule1E subrule2
   subrule1E:  /*NULL*/
     |         subrule1

If the IEEE spec says "list_of_rule: subrule { ',' subrule}" indicating a comma separated list then you need to use recursion:

   list_of_rule:  subrule1
     |         list_of_rule ',' subrule1

You'll get the hang of it. Bison is very widely used, so there's a great number of tutorials on the web that can help, or ask here if its Verilog specific.