![[logo]](/img/veripool_small.png)
Issue #278
verilog text does not print port direction for V2001 input code
| Status: | Closed | Start date: | 08/16/2010 | |
|---|---|---|---|---|
| Priority: | Normal | Due date: | ||
| Assignee: | Wilson Snyder | % Done: | 0% |
|
| Category: | - | |||
| Target version: | - |
Description
Reading in a Verilog 2001 file.. just the top level module (not its sub modules)
mod->dump shows that that ports are known with direction
printing the verilog_text results in an output file with no port direction
I believe IT installed Verilog-Perl-3.240 from CPAN
History
Updated by Wilson Snyder almost 2 years ago
- Status changed from New to Closed
- Assignee set to Wilson Snyder
Ah, I see now the difference. You need to call $netlist->link after reading and before calling verilog_text as this creates some references needed for the dumping to work. I've updated the documentation for the next release.
BTW I don't know what your "AUTOGEN" is, but you may want to take a look at the Verilog-Mode for Emacs AUTOINST/AUTOWIRE interconnection system. It may do what you need in a more supported and industry-wide way.
Also available in: Atom