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Issue #280
Can't trace signals with leading underscores.
| Status: | Closed | Start date: | 08/28/2010 | |
|---|---|---|---|---|
| Priority: | Normal | Due date: | ||
| Assignee: | Wilson Snyder | % Done: | 0% | |
| Category: | Invoking/Options | |||
| Target version: | - |
Description
I'm working with an existing (large) design that has a common idiom of using an underscore ('_') prefix for wires/regs that are active low.
Current head-of-line Verilator does not emit these signals in the VCD trace, but does emit all other signals.
Is there an option to set (or a patch I can apply) to permit Verilator to trace and dump signals that start with an underscore?
verilator.patch 
(7.12 KB)
History
#1 Updated by Wilson Snyder almost 3 years ago
- Status changed from New to Assigned
Would you like to attempt adding an option, say -trace-underscore, yourself?
Search for "Leading Underscore" and the next 3 lines in V3Trace.cpp. Then add a accessor to V3Option.h and parse it in V3Option.cpp, and document in bin/verilator. The options are in alphabetical order.
#2 Updated by Jason McMullan almost 3 years ago
- File verilator.patch added
Patch attached, versus verilator_3_803
#3 Updated by Wilson Snyder almost 3 years ago
- Category set to Invoking/Options
- Assignee set to Wilson Snyder
Perfect! I forgot about coverage, glad you added that too.
Pushed to git for next release.
I may make tracing _'s the default, but want to wait a few releases for this switch to exist so people can migrate.
#4 Updated by Wilson Snyder almost 3 years ago
- Status changed from Assigned to Resolved