You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Author Name: Christian Leber
Original Redmine Issue: 321 from https://www.veripool.org
Original Date: 2011-01-29
Original Assignee: Wilson Snyder (@wsnyder)
Hello,
we found a pretty simple problem in the linter, when people are not using other tools to stumble upon such problems it may stay undetected in the C++ simulation.
As you can see it does not complain about the instantiation of sub despite the i port is used 2 times, furthermore it also does not complain about the extra , at the end.
Btw.: verilator linting is a great help for quick repo sanity checks, thanks!
Christian Leber
The text was updated successfully, but these errors were encountered:
Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2011-01-29T23:04:09Z
How could that happen? Don't tell me you're still writing ports by hand instead of using "AUTOINST"? :)
BTW, it IS legal to have the trailing comma in some cases, it indicates
an empty port connection when doing by order connectivity. Thus verilator
simply dropped them.
Author Name: Christian Leber
Original Redmine Issue: 321 from https://www.veripool.org
Original Date: 2011-01-29
Original Assignee: Wilson Snyder (@wsnyder)
Hello,
we found a pretty simple problem in the linter, when people are not using other tools to stumble upon such problems it may stay undetected in the C++ simulation.
As you can see it does not complain about the instantiation of sub despite the i port is used 2 times, furthermore it also does not complain about the extra , at the end.
Btw.: verilator linting is a great help for quick repo sanity checks, thanks!
Christian Leber
The text was updated successfully, but these errors were encountered: