[logo] 
 
Home
News
Activity
About/Contact
Major Tools
  Dinotrace
  Verilator
  Verilog-mode
  Verilog-Perl
Other Tools
  BugVise
  CovVise
  Force-Gate-Sim
  Gspice
  IPC::Locker
  Rsvn
  Schedule::Load
  SVN::S4
  Synopsys-modes
  SystemPerl
  Verilog-Pli
  Voneline
  Vregs
General Info
  Papers

Issue #367

verilator does not do zero padding of decimal values in $display

Added by Alex Solomatnikov 10 months ago. Updated 10 months ago.

Status:Closed Start date:07/14/2011
Priority:Normal Due date:
Assignee:Wilson Snyder % Done:

0%

Category:WrongRuntimeResult
Target version:-

Description

For example:

$display( "mc%1d atc write: t=%07t i=%02d o=%02d a=%010h f=%h", channel_id, $time, atc_req_id_in, atc_req_op_in, atc_req_addr_in, atc_req_flags_in );

Output of modelsim:

  1. mc0 atc write: t=130005000 i=01 o=02 a=0000000000 f=00

Output of verilator:

mc0 atc write: t= 41 i= 1 o= 2 a=0000001440 f=03

History

Updated by Wilson Snyder 10 months ago

  • Category set to WrongRuntimeResult
  • Status changed from New to Resolved
  • Assignee set to Wilson Snyder

Surprising took this long to find this!

Fixed towards 3.814.

Updated by Alex Solomatnikov 10 months ago

Time stamp is still not zero padded:

mc0 atc write: t= 41 i=00 o=02 a=000000cb80 f=00

Updated by Wilson Snyder 10 months ago

%t is space padded per the spec, other simulators agree.

Updated by Wilson Snyder 10 months ago

  • Status changed from Resolved to Closed

In 3.820.

Also available in: Atom