|Assignee:||Wilson Snyder||% Done:|
tri0/tri1 - in Altera's IP.
Can they be supported given that verilator supports inouts?
#1 Updated by Wilson Snyder over 1 year ago
- Subject changed from tri0/tri1 are not supported to Support tri0/tri1
- Category set to Unsupported
- Status changed from New to Feature
Shouldn't be too hard to support, but other tristate bugs seem to break the simple solution to this. When those are blocked, it's easy to fix this - just add AstPull up/downs in the InoutVisitor.
For now added test test_regress/t/t_tri_pull01.v, which is currently set to be skipped.