Verilator

Code:

        parameter PIN_WIDTH = 1,
        parameter EXTRA_OUTPUT_WIDTH = 1,

...

wire [5:0] dq_outputdelaysetting1[PIN_WIDTH];
wire [5:0] dq_outputdelaysetting2[PIN_WIDTH];
wire [5:0] dq_inputdelaysetting[PIN_WIDTH];

wire [5:0] extra_outputdelaysetting1[EXTRA_OUTPUT_WIDTH];
wire [5:0] extra_outputdelaysetting2[EXTRA_OUTPUT_WIDTH];
wire [5:0] extra_inputdelaysetting[EXTRA_OUTPUT_WIDTH];

error:

 syntax error, unexpected ']', expecting ':'