%Error: ...: Internal: Blocking <= assignment in non-clocked block, should have converted in V3Active
|Assignee:||Wilson Snyder||% Done:|
Source code looks like:
initial begin ... a1 <= 1'b0; a2 <= 0; a3 <= 0; a4 <= 0; a5 <= 1'b0; a6 <= 1'b1; a7 <= 1'b1; a8 <= 1'b1; a9 <= 1'b0; a10 <= 1'b0; a11 <= 0;
verilator complains about these assignments.
#2 Updated by Alex Solomatnikov over 1 year ago
After I tried to convert non-blocking assignments <= to blocking =, I get:
%Error-BLKANDNBLK: ...: Unsupported: Blocked and non-blocking assignments to same variable: ...
Apparently, in this behavioral model some state registers are initialized using initial block. There is no way to compile this model with verilator because non-blocking assignment in initial block causes internal error and blocking assignment in initial block causes this error.
#3 Updated by Wilson Snyder over 1 year ago
In the BLKANDNBLK case, even though these are errors you can turn them off like you would a warning; this is because Verilator won't be modeling them as would be a normal simulator that honors the <= delays. Probably both <= and = should be allowed in initial blocks without warnings.