Test for System Verilog enumeration methods
|Assignee:||Jeremy Bennett||% Done:|
System Verilog provides a set of methods for operating on enumerations. This new test,
t_sv_enum_type_methods.pl, exercises those methods.
Please pull the test from https://github.com/jeremybennett/verilator/tree/sv-enum-test.
#1 Updated by Wilson Snyder over 1 year ago
- Status changed from New to AskedReporter
Thanks for the test.
This test needs to pass on VCS, NC or another simulator first. All complain "localparam t_pinid list = list.first;" is not considered a constant expression.
Also please remove trailing white space, and please add a $Self->unsupported call in the .pl file so the test passes until these features are supported.
#2 Updated by Jeremy Bennett over 1 year ago
Please pull an updated version from https://github.com/jeremybennett/verilator/tree/sv-enum-test.
The intention was to test the enumeration methods, so I have ditched the localparam. I will investigate whether any simulator supports that - I was led to believe that at least one treated these methods as constant.
The attached test passes with VCS. I have stripped all trailing space and added a $Self->unsupported call.