Issue #528
Support for reserved words weak0 and weak1
| Status: | Feature | Start date: | 06/29/2012 | |
|---|---|---|---|---|
| Priority: | Normal | Due date: | ||
| Assignee: | - | % Done: | 0% |
|
| Category: | Unsupported | |||
| Target version: | - |
Description
module hold(Y); inout Y; wire io_wire; buf(weak0,weak1) I0(Y, io_wire); buf I1(io_wire, Y); endmodule // hold
Causes the following errors:
Unsupported: Verilog 1995 reserved word not implemented: weak0 Unsupported: Verilog 1995 reserved word not implemented: weak1
I am using it for --lint-only, with the -language "1800-2005" option set.
The example Verilog code is part of a standard cell library, so there are lots of errors caused by this. I also tried to use the -v standard_cells.v switch, hoping that Verilator would ignore the "contents" of the cells, but without success - Verilator stops at these errors, preventing me to see other warnings and errors in my own code.
If I don't include the standard_cells.v file in my call to Verilator, I get lots of warnings about my code, but (unsurprisingly) also complains about not being able to find the modules defined in standard_cells.v.
History
Updated by Wilson Snyder 9 months ago
- Project changed from Verilog-mode to Verilator
Updated by Wilson Snyder 7 months ago
- Category set to Unsupported
- Status changed from New to Feature
Made a very simple attempt of just treating keywords as normal wires, but wasn't sufficient, so needs more attention to complete.
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