Verilog-Perl

Hi Wilson,

Actually I'm having some problems with the SigParse's callback "pin". The problem shows that the connection string it's not complete when I use a variable declared inside an interface. Example:

module x(interfacex x_if);

h inst_h(.push(x_if.pop));

endmodule

When the callback pin is excuted then it got as connection the string "x_if..". Is this the expected behavior? I would like to get the complete connection "x_if.pop". Could you provide a solution or give me a workaround?

Thank you in advance