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	#	Project	Tracker	Status	Priority	Subject	Assignee	Updated
	467	Verilator	Issue	Feature	Low	Support old format $display ($time, "...")		04/24/2012 07:21 pm
	468	Verilator	Issue	Feature	Low	Support primitive instantiations		04/25/2012 12:43 am
	476	Verilator	Issue	Feature	Low	Support && inside sensitivity list		04/03/2012 10:15 pm
	485	Verilator	Issue	Feature	Low	verilator does not detect if block name is used twice		04/19/2012 09:46 pm
	493	Verilator	Issue	Feature	Low	suppress useless width warning on string parameter comparisons		04/26/2012 08:24 pm
	496	Verilator	Issue	Feature	Low	Unsupported: tristate construct: ASSIGNDLY		04/26/2012 11:14 pm
	593	Verilator	Issue	Feature	Low	Support running make and creating top C file		01/15/2013 12:20 pm
	629	Verilator	Issue	Feature	Low	Non-vector timing loop warning		03/16/2013 12:33 am
	372	Verilog-mode	Issue	Feature	Low	Feature request - add syntax highlighting to C pre-processor directives	Michael McNamara	08/25/2011 08:52 pm
	285	Verilator	Issue	Feature	Low	Verilator lint misses bogusly-typed assignment and generates invalid C++	Wilson Snyder	09/26/2010 11:15 am
	385	Verilator	Issue	Feature	Low	Dpi exported tasks with array inputs don't compile.	Wilson Snyder	07/15/2012 03:19 pm
	50	Verilator	Issue	Feature	Normal	Clock gating support?		10/28/2009 01:51 pm
	63	Verilator	Issue	Feature	Normal	False Signal unoptimizable: circular logic warning		10/25/2010 08:07 pm
	225	Verilator	Issue	Feature	Normal	hierarchical compilation of designs for scalability		03/17/2010 08:14 pm
	234	Verilator	Issue	Feature	Normal	Support time and `timescales		04/07/2010 01:27 pm
	235	Verilator	Issue	Feature	Normal	Support fork-joins and time delays		04/07/2010 01:27 pm
	236	Verilator	Issue	Feature	Normal	Support real event loop		04/07/2010 01:26 pm
	355	Verilator	Issue	Feature	Normal	Support '{...}		08/12/2012 07:14 pm
	376	Verilator	Issue	Feature	Normal	Support "parameter type"		04/08/2012 10:02 pm
	377	Verilator	Issue	Feature	Normal	Support classes and methods		03/02/2012 11:42 pm
	378	Verilator	Issue	Feature	Normal	Support properties and assertions		03/02/2012 11:42 pm
	379	Verilator	Issue	Feature	Normal	Support dynamic memory new and delete		03/02/2012 11:42 pm
	426	Verilog-Perl	Issue	Feature	Normal	Add ability to not process some `ifdefs		12/23/2011 02:48 pm
	460	Verilator	Issue	Feature	Normal	Support enumeration type methods		03/21/2012 12:38 am
	466	Verilator	Issue	Feature	Normal	Support wires with array declarations		03/23/2012 12:51 pm

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