Verilog-mode

08/18/2010

11:49 pm Issue #279 (New): SystemVerilog Constraint auto-indentation

When a constraint block contains foreach or if statements, auto-indent does not work... Kev Pet

11:40 pm Issue #258 (Closed): "task automatic foo()" results in endcomment name "automatic"

Fixed in revision 636 Michael McNamara

02:20 pm Issue #259 (Closed): Wrong insertion of AUTOARG in Task

Believed to be user setting. Wilson Snyder

02:19 pm Issue #270 (Closed): AUTOINST and SystemVerilog interfaces

Fixed in rev634.
Here's an example output; there may well be other issues as this is a fairly major change, let me... Wilson Snyder

02:14 pm Issue #264 (Closed): verilog-mode v616; single char signals not blue

Sorry for the delay. Fixed in rev635.
Wilson Snyder

08/05/2010

05:40 pm Issue #276 (Closed): Updating text from file on every C-c,C-a

Glad it works. Wilson Snyder

05:36 pm Issue #276: Updating text from file on every C-c,C-a

Sorry for the confusion. I googled the issue and saw that someone else was having problems with this macro. I updated... Andreas Olofsson

03:18 pm Issue #276: Updating text from file on every C-c,C-a

Um, I'm confused, don't you want it to insert on every C-c C-a?
Wilson Snyder

12:53 pm Issue #276 (Closed): Updating text from file on every C-c,C-a

My apologies if there is an easy way to do this already, but I couldn't find one, so I am adding this as a feature re... Andreas Olofsson