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Activity
From 07/09/2012 to 08/07/2012
08/07/2012
- 10:24 pm Issue #543 (Resolved): defparam inside generate does not work correctly
- Fixed in git towards 3.841.
- 04:49 pm Issue #543: defparam inside generate does not work correctly
- I didn't write this code - it's an IP. Unfortunately, I have to deal with it. Other simulators can handle it.
- 11:03 am Issue #543: defparam inside generate does not work correctly
- Generates were first added in Verilog 2001, the same standard which made defparam a depreciated construct. Therefore...
- 01:24 am Issue #543: defparam inside generate does not work correctly
- Related issue: a_sv has REGULAR_WRITE_BUS_ORDERING parameter and a_abstract does not. Instantiation is correct, i.e. ...
- 01:14 am Issue #543 (Closed): defparam inside generate does not work correctly
- This used to work 3 months ago:...
- 01:03 am Issue #542 (Closed): import package is broken under multiply instantiated cells
- This used to work 3 months ago:...
08/02/2012
- 11:03 am Issue #541 (Resolved): Improper WIDTH warning on a parameterized module
- Fixed in git towards 3.841.
- 03:16 am Issue #541 (Assigned): Improper WIDTH warning on a parameterized module
- I believe this was broken in the fix for bug470, the top-down order of parameter module processing was violated. I h...
08/01/2012
- 08:06 am Issue #541 (Closed): Improper WIDTH warning on a parameterized module
- I have five-year experience using Verilator --cc on CentOS x86_64. Thank you for this great tool.
The issue I hav...
07/31/2012
- 11:24 pm Issue #474 (Feature): Support inserting package symbols underneath module symbols
- You are right, the bug fixed was part of your test case but not the main point, which remains unresolved.
- 11:04 pm Issue #474: Support inserting package symbols underneath module symbols
- Was this issue really fixed?
Changes file says about different issue:
Fix parameters not supported in constant ... - 10:58 pm Issue #55 (Closed): Tristate: Tracing an inout signal is broken
- In 3.840.
- 10:58 pm Issue #499 (Closed): %Error: Internal Error: ...: ../V3Slice.cpp:418: Couldn't find a VarRef on t...
- In 3.840.
- 10:58 pm Issue #505 (Closed): %Error: ...: Expecting expression to be constant, but can't determine consta...
- In 3.840.
- 10:58 pm Issue #510 (Closed): Error with unsized elements in tristate select
- In 3.840.
- 10:57 pm Issue #474 (Closed): Support inserting package symbols underneath module symbols
- In 3.840.
- 10:57 pm Issue #51 (Closed): Mixing tristate and low-Z drivers. Error Msg unclear.
- In 3.840.
- 10:57 pm Issue #54 (Closed): Tristates break when a child modules does has no driver
- In 3.840.
- 10:56 pm Issue #534 (Closed): config_rev.pl not called when verilator used as a git submodule
- In 3.840.
- 10:56 pm Issue #530 (Closed): Compiler error with GCC 4.7.0
- In 3.840.
- 10:56 pm Issue #513 (Closed): Loop causes internal error
- In 3.840.
- 10:55 pm Issue #490 (Closed): %Error: Internal Error: ...: ../V3Link.cpp:113: Symbol table not found looki...
- In 3.840.
- 10:55 pm Issue #501 (Closed): Real data type lost/Expected real input to RTOIS
- In 3.840.
- 10:55 pm Issue #491 (Closed): %Error: ...: Expected integral (non-real) input to ITORD
- In 3.840.
- 10:55 pm Issue #511 (Closed): signed/unsigned mixed calculation with WIDTH warning off
- In 3.840.
- 10:54 pm Issue #516 (Closed): suppress multiple warnings for the same issue
- In 3.840.
- 10:54 pm Issue #413 (Closed): generate-conditional with short-circuited local expression
- In 3.840.
- 10:54 pm Issue #478 (Closed): %Error: ...: Internal: Blocking <= assignment in non-clocked block, should h...
- In 3.840.
- 10:54 pm Issue #488 (Closed): Support pmos, etc.
- In 3.840.
- 10:54 pm Issue #462 (Closed): Support tri0/tri1
- 10:53 pm Issue #462: Support tri0/tri1
- In 3.840.
- 10:53 pm Issue #181 (Closed): Support struct and union
- In 3.840.
- 10:52 pm Verilator 3.840 Released
- Verilator 3.840 2012/07/31 Beta
This version has large internal changes and may be less stable then the previous r... - 03:03 pm Issue #538: Mac OSX data types
- I suggested the __WORDSIZE a couple years ago, before I did I checked on a mac and __WORDSIZE was getting defined in ...
07/29/2012
- 02:18 pm Issue #181 (Resolved): Support struct and union
- Packed struct and unions are now in the git version towards 3.900. Note '{} is not supported yet, but will follow so...
07/26/2012
- 10:36 pm Issue #538 (Assigned): Mac OSX data types
- There were some Mac issues fixed in the git version, though I'm not sure about that one. Please give it a try.
Wh... - 10:21 pm Issue #538 (NoFixNeeded): Mac OSX data types
- I routinely use verilator on my macbook pro. So thank you for making it available, and it is great to be able to say...
07/24/2012
- 10:49 pm Issue #536 (Closed): Regression test driver does not generate initial VCD values
- Thanks for the patch, committed. BTW to get the tests to pass needed to conditionality use !$self->sc_or_sp otherwis...
- 01:36 pm Issue #536 (Closed): Regression test driver does not generate initial VCD values
- The generated main program used by regression tests includes code to generate VCD if that is configured. However it d...
07/23/2012
- 02:05 pm Issue #535 (Assigned): SystemC 2.3.0 does not work with Verilator tests
- 02:05 pm Issue #535: SystemC 2.3.0 does not work with Verilator tests
- Yes, you need to
export SYSTEMC_CXX_FLAGS=-pthread
Annoyingly that wasn't needed in the pre-released 2.3.0.
... - 01:58 pm Issue #535 (NoFixNeeded): SystemC 2.3.0 does not work with Verilator tests
- I've just discovered that the Verilator tests (*make test*) do not work with the new SystemC 2.3.0, failing due to la...
07/22/2012
- 11:50 pm Issue #534 (Resolved): config_rev.pl not called when verilator used as a git submodule
- Thanks for the report, simple enough to fix. Fixed in git towards 3.840++.
- 09:11 pm Issue #534 (Closed): config_rev.pl not called when verilator used as a git submodule
- Compilation fails when Verilator repository is cloned as a git submodule.
This can be reproduced with :...
07/20/2012
- 03:23 pm Issue #533 (Assigned): Missing width warning when part of a bus is compared
- Actually there should be a WIDTH warning here to tell people what's odd.
Note also your test needs to compare only... - 03:17 pm Issue #533: Missing width warning when part of a bus is compared
- 0 is 32 bits wide, not 6 bits. If you compare with 6'h0 you'll get what you expect.
- 02:56 pm Issue #533: Missing width warning when part of a bus is compared
- If a = 16'hffff, a[5:0] would be 6'h3f. Inverting this should give 0. comparing this with 0 should give TRUE. However...
- 10:29 am Issue #533 (NoFixNeeded): Missing width warning when part of a bus is compared
- Thanks for the good test, however I'm not sure why you think the answer should be 1, as VCS, NC and Verilator all agr...
- 02:43 am Issue #533 (Assigned): Missing width warning when part of a bus is compared
- Verilator generates incorrect code for the comparison...
07/19/2012
- 04:10 pm Issue #532 (Assigned): Support +systemverilogext+
- Makes sense. FYI VCS supports
+systemverilogext+<ext>
+verilog1995ext+<ext>
+verilog2001ext+<ext>
So I'd sug... - 03:59 pm Issue #532 (Closed): Support +systemverilogext+
- VCS provides an option, @+systemverilogext+@, to specify that a particular file extension is associated with SystemVe...
07/17/2012
- 05:40 pm Issue #531: Combinatorial loop fails to converge
- Thanks for the explanation.
This came out of my efforts to get combinatorial always blocks with non-blocking assig... - 05:01 pm Issue #531: Combinatorial loop fails to converge
- P.S. what they are probably really after is
always @(posedge clk or negedge clk)
y <= y + 1
- 05:00 pm Issue #531 (AskedReporter): Combinatorial loop fails to converge
- always @(non-edge) with only ='s indicates combinatorial logic. This I suspect won't synthesize, either, which is th...
- 04:56 pm Issue #531 (NoFixNeeded): Combinatorial loop fails to converge
- This may not be a bug, but a failure by me to understand the limitations of cycle accurate modeling. The following co...
07/15/2012
- 04:27 pm Issue #530 (Resolved): Compiler error with GCC 4.7.0
- Thanks for the good patch set. Fixed in git towards 3.840+.
- 03:19 pm Issue #385: Dpi exported tasks with array inputs don't compile.
- I'm not actively working on DPI improvements, so there will be a good wait. If you would like to try to make the imp...
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