Activity
From 04/21/2013 to 05/20/2013
Today
- 01:23 pm Installation: RE: Verilator instalation
- For the record I've run into the same problem last week, bringing Verilator up on a new Fedora 18 64-bit machine with...
05/17/2013
- 11:42 pm Usage: RE: using split VCD trace
- Hello,
my friend Gregory has used part of my work in his Atari Jaguar SOC.
This is here :
https://github.com/Tor...
05/15/2013
- 12:47 pm Development: RE: SystemVerilog interfaces
- Can you share with us some info on what features of SystemVerilog interfaces that will be supported?
Kenny
05/13/2013
- 09:58 am Installation: RE: Verilator instalation
- Thanks,
Problem solved,the problem (i think) is related with the linking with this version of g++ 4.7.2. I forced ...
05/12/2013
- 08:17 pm Installation: RE: Verilator instalation
- Maybe the shared object is inconsistent with the headers or something, I'm not sure but I always use static linking f...
- 07:06 pm Installation: RE: Verilator instalation
- Yes the systemc test all pass on all the installs i made.
Now i installed the Ubuntu 13.04 x86_64 on a vm,and the te... - 12:32 pm Installation: RE: Verilator instalation
- From the backtraces I don't believe this is verilator related. Do the systemc tests pass without verilator?
Most ... - 09:10 am Installation: RE: Verilator instalation
- Thanks for your reply,
I recompiled systemc and the test_sc per your instructions to take the backtrace, and the v...
05/11/2013
- 08:26 pm Development: RE: False circular logic and other issues when parsing 3rd party code
- Please see bug63 and the UNOPTFLAT section of the manual for more details, there are some reporting options that were...
- First of all many thanks for quickly fixing bug642 and bug643. I will shortly verify those fixes with my project.
Du...
05/10/2013
- 02:24 am Installation: RE: Verilator instalation
- Seems suspicious given that version of Verilator and SystemC seems to work for everyone else. It's certainly possibl...
05/09/2013
- Hi everyone.
First let me thank the developers for this amazing tool.
Right now i think i am having some troubles...
05/08/2013
- 10:56 am Development: RE: support for unsized SV integer constants
- This is bug256, which is unfortunately harder to fix than it might appear. I would suggest defining DELAY as nothing.
- 10:52 am Usage: RE: how to prevent verilator from analyzing meta-comments?
- Right, the pipe filter is a great example application for things like this.
There's an example of filtering in tes... - Below SV code doesn't seem to compile with "verilator -sc unsized.sv" command:...
- I'm new to verilator and just started playing with it. I have some big 3rd party SV code, which I really don't want t...
05/05/2013
- 02:06 pm Usage: RE: how to drive data in a single clock domain
- Thanks for the pointer. You need this:
reg Trd /*verilator public_flat_rw @(negedge clk)*/;
reg Twr /*veri... - 04:20 am Usage: RE: how to drive data in a single clock domain
- I think that on time 62 (jpg is also included), the value of DUT ferri (pipe_fifo.v:49) should be 0. I call eval ever...
05/04/2013
- 09:01 pm Usage: RE: how to drive data in a single clock domain
- Verilator is cycle based so doesn't propagate events from signals set in DPI tasks (trd/twr), instead it waits for th...
- 08:09 pm Usage: RE: how to drive data in a single clock domain
- Please see a simple example.
Correct behavior is the ferr is not asserted after a single cycle write set.
When I sa... - 07:58 pm Usage: RE: how to drive data in a single clock domain
- Registered outputs should of course only change when the clocks change. I'm probably confused, can you draw a diagra...
- 07:51 pm Usage: RE: how to drive data in a single clock domain
- I call eval every time change in the first place. It seems that eval is doing somthing only on a positive
edge.
If... - 07:36 pm Usage: RE: how to drive data in a single clock domain
- I'm not sure I understand exactly, but I think you're saying the data is racing. The "C" interface doesn't have a pr...
- Hi
I am new to verilator. I have problems in driving data to a simple single clock DUT.
If clock edge and data st... - 03:21 pm Usage: RE: verilator DPI
- Hello
Thank you very much for your help. The debian package was not working okay. I removed it and installed and bui... - 02:53 pm Usage: RE: verilator DPI
- BTW you may want to skip the "make install". Instead "setenv VERILATOR_ROOT `pwd`" then run $VERILATOR_ROOT/bin/veri...
- 02:51 pm Usage: RE: verilator DPI
- I understand, but debian lags the mainline and doesn't have many bug fixes. Follow the [[Installing]] instructions, ...
- 02:41 pm Usage: RE: verilator DPI
- I did not build it myself. I used apt-get install verilator.
I assume I have to build it myself.
My build does not ... - 02:36 pm Usage: RE: verilator DPI
- BTW check the version you are using; I'm not sure how close it is to the head; maybe the release from here will work ...
- 02:34 pm Usage: RE: verilator DPI
- Works fine for me. I get "task drive 0 0 at 2" etc then it ends.
Sorry must be something related to your site, yo... - 02:19 pm Usage: RE: verilator DPI
- All files are attached:
cmp.unx //compile and run
sim_main.cpp
pipe_fifo_tool.sv
pipe_fifo.v
./cmp.unx
./obj_... - 02:04 pm Usage: RE: verilator DPI
- Not sure why it isn't working; but you will need to (later) findScope("TOP.v") to get to it, or pass a different name...
- 01:50 pm Usage: RE: verilator DPI
- Some more info about DPI crash from gdb:
(gdb) info function t_gen_stim
All functions matching regular expression... - 01:21 pm Usage: RE: verilator DPI
- Hi
I did create :
pipe_fifo_tool = new Vpipe_fifo_tool;
I added the dump statement:
pipe_fifo_tool = new Vpip... - 11:25 am Usage: RE: verilator DPI
- Should work, though the scope probably needs to be u_dut.v. But that's not the problem as the error would be differe...
- I have downloaded and installed on my debian machine verilator (using apt-get install).
It works fine with simple ex...
04/30/2013
- 09:17 am Installation: RE: Verilator binaries for windows
- Verilator itself is not compiled with Visual Studio. Visual Studio is only used to run Verilator and compile Verilato...
- 08:20 am Installation: RE: Verilator binaries for windows
- Hi, I managed to compile the verilator.exe with the XMLs, sln, proj and projfilters provided. But how can I compile t...
04/29/2013
- 02:56 am Usage: RE: public access to the module #parameter block from C++
- Yes it does. Thank you.
I think my mistake was putting /*verilator public*/ on the same line but after the comma.
...
04/28/2013
- 10:58 pm Usage: RE: public access to the module #parameter block from C++
- This should make "TWO" visible in the class header.
module b #(
parameter TWO /*verilator public*/ =...
04/25/2013
- 05:11 pm Development: RE: SystemVerilog interfaces
- Great! Thanks Wilson
04/24/2013
- 02:20 pm Usage: RE: sc_uint instead of native uint?
- I'll probably do that, indeed. I'm not very keen on my current solution of adding another level to wrap it in sc_uint...
- 12:18 pm Usage: RE: sc_uint instead of native uint?
sc_uint didn't originally exist in SystemC, and verilator anyhow needs native uints for non-SystemC generation.
...- 12:12 pm Development: RE: SystemVerilog interfaces
- Interfaces should be in by the next release or one after - by end of June.
04/23/2013
- Hi - I was wondering why the two verilator options for systemc ports are sc_bv and native uints, instead of sc_bv and...
04/22/2013
- 12:17 pm Usage: RE: public access to the module #parameter block from C++
- that makes sense. thank you.
- 07:58 am Usage: RE: public access to the module #parameter block from C++
- Hi B Abali,
The parameter is a constant - it will have been optimized out by the compiler. Indeed optimizing out p...
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