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Issues

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	#	Tracker	Status	Priority	Subject	Assignee	Updated
	250	Issue	Closed	Normal	%Error: Stack overflow in regexp matcher	Wilson Snyder	04/30/2010 01:27 pm
	245	Issue	Closed	Normal	.PORT System Verilog autoinst naming	Wilson Snyder	04/20/2010 02:40 pm
	74	Issue	WillNotFix	Low	/*AUTOWIRE*/ of undriven inputs	Wilson Snyder	04/02/2009 09:45 pm
	269	Patch	Closed	Normal	A patch to add verilog-auto-tieoff-ignore-regexp	Wilson Snyder	07/15/2010 11:08 am
	529	Patch	Closed	Normal	Add batch mode for verilog-delete-trailing-whitespace	Wilson Snyder	07/15/2012 03:44 pm
	371	Issue	Closed	Normal	Add variable to automatically "delete-trailing-whitespace" after updating AUTOs	Wilson Snyder	07/21/2011 02:22 pm
	565	Issue	Closed	Normal	Adding parameters to module causes first interface to disappear in AUTOINST	Wilson Snyder	10/08/2012 09:19 pm
	637	Issue	Closed	Normal	Array ports are not handled properly by AUTOINST	Wilson Snyder	04/30/2013 12:57 pm
	373	Issue	Closed	Normal	AUTO problems with ports of type array of structures	Wilson Snyder	08/09/2011 11:32 pm
	353	Issue	Closed	Normal	AUTOARG and SV typedef as port	Wilson Snyder	05/17/2011 10:55 am
	302	Issue	Closed	Normal	AUTOINST and AUTOINSTPARAM problem	Wilson Snyder	11/30/2010 09:54 am
	270	Issue	Closed	Normal	AUTOINST and SystemVerilog interfaces	Wilson Snyder	08/18/2010 02:19 pm
	640	Issue	WillNotFix	Normal	AUTOINST truncates inputs with array instantiation and wide inputs		05/01/2013 05:23 pm
	445	Issue	Closed	Normal	AUTOINST uses the wrong AUTO_TEMPLATE	Wilson Snyder	02/29/2012 12:50 pm
	540	Issue	Closed	Normal	AUTOINSTing an interface create illegal code	Wilson Snyder	08/21/2012 12:27 am
	338	Issue	Closed	Normal	AUTOLOGIC and AUTOBIT	Wilson Snyder	04/12/2011 07:27 pm
	381	Issue	Closed	Normal	AUTORESET adds resets for variables that are out of scope	Wilson Snyder	09/13/2011 02:17 pm
	590	Issue	Closed	Normal	AUTORESET improperly tries to initialize arrays		12/17/2012 04:06 pm
	294	Issue	Closed	Normal	AUTOS does not support array of signals	Wilson Snyder	10/22/2010 02:40 am
	539	Issue	Closed	High	AUTOs for wrapping a module around an interface	Wilson Snyder	08/19/2012 11:33 pm
	295	Issue	Closed	Normal	AUTOWIRE does not declare wire for AUTOINST output when interface has same name	Wilson Snyder	10/20/2010 02:04 pm
	317	Issue	Closed	Normal	AUTOWIRE does not support package_import_declaration before module port list	Wilson Snyder	01/19/2011 05:41 pm
	195	Issue	Closed	Normal	AUTOWIRE does not work with types declared in a package (SystemVerilog)	Wilson Snyder	04/20/2010 02:40 pm
	356	Issue	Closed	Normal	AUTO_LISP not evaluating correctly	Wilson Snyder	11/29/2011 02:18 pm
	594	Issue	Closed	High	Bug report: macro parsing hang	Wilson Snyder	12/21/2012 03:12 pm

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