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Issues

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	#	Tracker	Status	Priority	Subject	Assignee	Updated
	647	Issue	New	Normal	verilog-read-defines issue with multiline comments		05/21/2013 07:24 pm
	636	Issue	New	Normal	SV Interface indentation issue in module ports		04/11/2013 02:12 pm
	626	Issue	New	High	problem/question for AUTOLOGIC of array with different elements going to different instances		03/03/2013 08:13 pm
	597	Issue	Assigned	Normal	Problem with verilog-typedef-regexp	Wilson Snyder	12/31/2012 01:35 pm
	585	Patch	New	Normal	Problem with verilog-pretty-declarations function and parameter/localparam keywords, fix in attachment	Wilson Snyder	11/30/2012 01:03 pm
	579	Issue	New	Normal	Creating top-level ports for unsed sub-module ports.		11/15/2012 07:37 pm
	562	Issue	Feature	Normal	bus width alignment		05/22/2013 02:11 am
	560	Issue	New	Normal	Indentation following SV randomize command is incorrect		09/07/2012 02:37 pm
	559	Issue	New	Normal	Nested ifdef with generate indentation bug	Michael McNamara	09/06/2012 09:59 pm
	557	Issue	New	Normal	Indentation is wrong after "DPI-C" imports for context		08/31/2012 06:08 pm
	556	Issue	New	High	replication breaks alignment		08/27/2012 09:46 pm
	549	Issue	New	Normal	verilog-in-slash-comment-p doesn't return true	Michael McNamara	08/15/2012 01:37 am
	447	Issue	Assigned	Normal	verilog-pretty-expr doesn't work in latest version	Michael McNamara	03/07/2012 12:23 am
	439	Issue	Assigned	Normal	Indentation problems after `ovm_do_with macro	Wilson Snyder	02/09/2012 12:49 pm
	437	Issue	New	Normal	Indentation of continued assignment incorrect if first line ends with ']'		02/03/2012 02:38 pm
	435	Issue	New	Normal	Indenting comments on declarations in v736		03/30/2012 09:57 am
	433	Issue	New	Normal	indenting for some forms of SystemVerilog constraints is wrong/odd		02/21/2013 12:27 pm
	430	Issue	New	Normal	Incorrect indentation in Verilog Mode v736	Michael McNamara	02/23/2012 05:27 pm
	427	Issue	New	Normal	alignment in always @(*) blocks behaves strangely	Michael McNamara	01/02/2012 05:05 pm
	386	Issue	New	Normal	Indenting of user-defined data types		02/06/2012 01:08 am
	372	Issue	Feature	Low	Feature request - add syntax highlighting to C pre-processor directives	Michael McNamara	08/25/2011 08:52 pm
	336	Issue	Assigned	Normal	Incredibly slow Indenting	Michael McNamara	12/12/2012 08:20 pm
	332	Issue	New	Normal	Calculated parameters in port widths	Wilson Snyder	05/31/2012 01:51 pm
	330	Issue	New	Normal	Identation after always* construct inside named block	Michael McNamara	03/09/2011 02:59 am
	324	Issue	Assigned	Normal	verilog-mode constraint indentation is not correct	Michael McNamara	02/04/2011 01:52 pm
	320	Issue	Assigned	Normal	Interface port connection using .* is wrong (?)	Wilson Snyder	01/27/2011 09:56 pm
	308	Issue	Feature	Normal	Indenting/Highlighting user defined types	Michael McNamara	02/21/2011 02:21 am
	286	Issue	New	Low	Identation of classes inside package in SystemVerilog	Michael McNamara	09/27/2010 07:41 am
	279	Issue	Assigned	Normal	SystemVerilog Constraint auto-indentation	Michael McNamara	12/02/2010 02:53 pm
	271	Issue	New	Normal	Indentation issues with doxygen comments	Michael McNamara	03/30/2012 09:57 am
	104	Issue	Feedback	Normal	Indentation failures in v528	Michael McNamara	12/15/2011 06:50 pm

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