Verilog-Perl

11/24/2009

07:21 pm Issue #192 (Resolved): SV unrecognized covergroup

Fixed in git for 3.223ish.
The patch is simple, as it's an off-by-one bug:... Wilson Snyder

06:50 pm Issue #192 (Closed): SV unrecognized covergroup

... vesselin kavalov

02:59 pm Issue #177 (Closed): ContAssign verilog_text forget verilog separator

In 3.222.
Wilson Snyder

02:58 pm Issue #183 (Closed): SV unrecognized syntax: Multidimensioned typedef references

In 3.222.
Wilson Snyder

02:58 pm Issue #191 (Closed): Define with formal matching $pli call gets misexpanded

In 3.222. Wilson Snyder

02:57 pm Verilog-Perl 3.222 Released

Verilog::Language 3.222 2009/11/24
**** Fix missing ; in ContAssign::verilog_text, bug177. [Nicolas Wilhelm]
... Wilson Snyder

11/23/2009

07:26 pm Issue #191 (Resolved): Define with formal matching $pli call gets misexpanded

Fixed in git for 3.222++. Wilson Snyder

07:04 pm Issue #191 (Closed): Define with formal matching $pli call gets misexpanded

`define foo(bits) $display("bits %d %d", $bits(foo), `bits)
`foo(10) gives
$display("bits %d %d", $10(foo), 10... Wilson Snyder

11/16/2009

11:53 pm Issue #96 (Closed): Possible error with void' casting

Issue believe fixed in earlier release as example passes. Wilson Snyder

11:51 pm Issue #187 (Closed): SV unrecognised syntax #2

Tried the old version, this is a duplicate of bug183. Wilson Snyder

11:50 pm Issue #189 (Closed): SV unrecognised syntax #4

This is a duplicate of bug183.
Wilson Snyder

10:48 pm Issue #189 (Closed): SV unrecognised syntax #4

vesselin kavalov

10:14 pm Issue #188 (Rejected): SV unrecognised syntax: 2D params/typedef instantiations

Ah, it's a bad test. You haven't typedef'ed fp_fri_pkt_cnt_t.
Sorry the error's so ugly, I'll see if I can clean ... Wilson Snyder

10:11 pm Issue #188: SV unrecognised syntax: 2D params/typedef instantiations

Fails for me. Strange, thought bug183 would've fixed this. Wilson Snyder

10:11 pm Issue #188 (Assigned): SV unrecognised syntax: 2D params/typedef instantiations

Wilson Snyder

10:08 pm Issue #187 (AskedReporter): SV unrecognised syntax #2

This works for me, are you trying the git version?
Wilson Snyder

10:06 pm Issue #188 (Rejected): SV unrecognised syntax: 2D params/typedef instantiations

Fails for me. Strange, thought bug183 would've fixed this.
vesselin kavalov

09:58 pm Issue #187 (Closed): SV unrecognised syntax #2

vesselin kavalov

09:37 pm Issue #186: (Allegedly) more SV unrecognised syntax

BTW your bug183 was a fine example, too. Wilson Snyder

09:24 pm Issue #186 (Rejected): (Allegedly) more SV unrecognised syntax

I'm sorry about this but I'm not under NDA with your company and we both need to honor the copyrights in the files, u... Wilson Snyder

09:08 pm Issue #186 (Rejected): (Allegedly) more SV unrecognised syntax

Please see the attached files! Please excuse if multiple files fail for the same root cause - I tried hard to uniquif... vesselin kavalov

11/12/2009

08:36 pm Issue #183 (Resolved): SV unrecognized syntax: Multidimensioned typedef references

Sorry, I had misread the specification "{packed_dimension} vs [packed_dimension]"
Fixed in git for 3.222. Wilson Snyder

08:08 pm Issue #183: SV unrecognized syntax: Multidimensioned typedef references

Oops! I didn't know it will smear the new lines :( Attaching the file vesselin kavalov

08:06 pm Issue #183 (Closed): SV unrecognized syntax: Multidimensioned typedef references

%Error: test1.v:30: syntax error, unexpected '[', expecting IDENTIFIER or '='... vesselin kavalov

11/11/2009

12:15 pm Issue #182 (Rejected): Handling of interface/struct style of indentfiers

That's correct, clk_va is a symbol, it's attached to another symbol with the . operator. Symbols are single things y... Wilson Snyder

05:56 am Issue #182 (Rejected): Handling of interface/struct style of indentfiers

In system verilog
always_ff @(posedge clk_va)
du_fu.opcode <= opcode;
such kind of assignment is posseibl... ashutosh khare

11/10/2009

12:38 am Issue #89 (Closed): Macro expansion question

Settled months ago. Wilson Snyder

11/09/2009

02:20 pm Issue #177 (Resolved): ContAssign verilog_text forget verilog separator

Sorry about that, I had a test but didn't look at the output well enough.
Fixed in git for next release, 3.222. Wilson Snyder

02:15 pm Issue #177 (Closed): ContAssign verilog_text forget verilog separator

Hello,
Reading and writting following verilog statement : assign toto = 1'b0 ;
lead to statement where ';'... Nicolas WILHELM

10/28/2009

01:47 pm Issue #92 (Rejected): vppreproc: doesn't understand System Verilog typedef?

Closing due to no response - please reopen if you find a testcase.
Wilson Snyder

01:46 pm Patch #168 (Closed): vppreproc doesn't parse strings with line continuation characters

Fixed in Verilog-Perl 3.221, and Verilator 3.720. Wilson Snyder

01:45 pm Issue #169 (Closed): compile problem related to gettext on Linux

Fixed in 3.221 Wilson Snyder

01:45 pm Verilog-Perl 3.221 Released

Verilog::Language 3.221 2009/10/28
**** Fix SystemPerl hitting "undefined find_interface..." in 3.220.
**** ... Wilson Snyder