Veripool

06/26/2009

08:12 pm Verilog-Perl Issue #96: Possible error with void' casting

Here is a sample, I hope it helps.

06/16/2009

04:02 pm Verilog-Perl Issue #96: Possible error with void' casting

Hi Wilson,
I havent prepared an example yet, I'm tracing the problem, and it seems to be related to functions ins...

03:47 pm Verilog-Perl Issue #94: Preprocessor callback request

Hi Wilson,
I know Saul from school and we're working on similar projects. He sent me the extended parser code prior...

06/05/2009

04:16 pm Verilog-Perl Issue #96 (Closed): Possible error with void' casting

Hi Wilson,
If I'm not mistaken, the SigParser currently doesn't support void' casting of functions return data? (...

04:08 pm Verilog-Perl Issue #94: Preprocessor callback request

Thanks, that worked fine!.

05/29/2009

07:07 pm Verilog-Perl Issue #94: Preprocessor callback request

Thats what I need. I'll take a look. Thanks

12:30 am Verilog-Perl Issue #94: Preprocessor callback request

Hi Wilson,
Does this work for macros with arguments? I haven't find the way to do what I need.
Ideally what I nee...

05/28/2009

03:26 am Verilog-Perl Issue #94: Preprocessor callback request

I'll give it a try, thanks!

03:23 am Verilog-Perl Issue #89: Macro expansion question

Yes thanks.
BTW, would it be possible for the Preproc to leave newlines when the `line are suppressed (line_direc...

05/27/2009

11:39 pm Verilog-Perl Issue #94 (Closed): Preprocessor callback request

Hi,
I might be wrong, but I haven't found a way (callback) to let the parser notify me when a (previously define)...