Veripool

08/31/2011

07:38 pm Verilator Usage: RE: Debug zero-time loop

So, having resolved my previous issue, I'm unable to get tracing working. I'm using exactly the same code as from a ...

08/30/2011

11:48 pm Verilator Usage: RE: Debug zero-time loop

Resolved -- error between seat and keyboard. SC_CTHREAD() only calls method task once and not once per event. Thank...

07:43 pm Verilator Usage: Debug zero-time loop

I've been trying to debug what looks like a zero-time loop. I suspect the problem is in my testbench because the ori...

12/20/2009

09:52 pm Verilator Usage: RE: Memory usage for gate sim

Actually, this isn't a particularly large chip. The block we are working on is about 6mm^2 in 65nm, which comes out ...

08:11 pm Verilator Usage: RE: Memory usage for gate sim

I reran with the above two options and memory usage seems to build slowly up to its maximum usage. There are several...

07:18 pm Verilator Usage: RE: Memory usage for gate sim

Hi,
Just reread my original post and I used the wrong terminology. It's not GCC that's running out of memory, it'...

12/19/2009

02:15 am Verilator Usage: Memory usage for gate sim

Hi,
I'm trying to use Verilator for a large gate simulation, and the memory consumption is too high for it to comp...

11/25/2009

09:23 pm Verilator Issue #193: Support install to non-standard location

Understood, the issues seems to have been with VERILATOR_ROOT. If I unset this variable then the makefile is generat...

08:03 pm Verilator Issue #193 (Closed): Support install to non-standard location

I installed verilator to /opt/verilator using:
./configure --prefix=/opt/verilator
There seem to be some assump...