Veripool

03/16/2011

01:38 pm SystemPerl General: RE: AUTOINIT handles sc_signal

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01:36 pm SystemPerl General: AUTOINIT handles sc_signal

Module.pm
c210c210
} $self->ports) {
} $self->nets) {

07/23/2008

09:48 am Verilator Issue #26: wrong circular logic detect

cy wang wrote:
> The circular logic detector needs to consider index of wire.
> The attached file is a simple examp...

07:22 am Verilator Issue #26 (Closed): wrong circular logic detect

The circular logic detector needs to consider index of wire.
The attached file is a simple example to demo it.
Alth...

07/22/2008

04:20 pm Verilator Issue #23: prefix problem

Wilson Snyder wrote:
> What sort of problems? What's the error message?
>
> Do you see the files in the installe...

09:09 am Verilator Issue #25 (Closed): Public function output compile error "non-lvalue statement"

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12:49 am Verilator Issue #24 (WillNotFix): synopsys translate_off and synopsys translate_on

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07/20/2008

11:53 am Verilator Issue #23: prefix problem

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11:43 am Verilator Issue #23 (Closed): prefix problem

./configure --prefix=/XX/local;make;make install
the following files are installed.
-->
/XX/local/bin/verilator
/...