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Rick Ramus

  • Email: Must_Login
  • Registered on: 01/11/2010
  • Last connection: 03/31/2010

Activity

Reported issues: 5

03/31/2010

04:48 pm Verilog-Perl Issue #231 (NoFixNeeded): always_comb default syntax error
I get the following error when running the attached code:
Syntax error, unexpected "default", expecting "CLASS-IND...
04:45 pm Verilog-Perl Issue #230 (NoFixNeeded): can't find *.vs files
When module files end in .vs rather than .v, they are not found.
04:44 pm Verilog-Perl Issue #229 (NotEnoughInfo): assert syntax errors
For the following assert statement:
`define ASSERT1(sig,rst) assert final(rst || $onehot0(sig))
`ASSERT1(sig,rst)
...

03/03/2010

12:43 am Verilog-Perl Issue #221 (Closed): property errors
when running latest release of verilog-perl on attached file, I get the following errors:
%Error: test20.v:9: synt...

01/25/2010

09:32 pm Verilog-Perl Issue #202: verilog parser error
...

01/11/2010

09:39 pm Verilog-Perl Issue #202 (Closed): verilog parser error
...

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