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Stefan Wallentowitz

  • Email: Must_Login
  • Registered on: 03/16/2010
  • Last connection: 10/26/2011

Activity

Reported issues: 2

10/26/2011

09:01 am Verilator Patch #402: "force bitvector" attribute
Thanks for the feedback.
Of course I changed the name, added documentation to bin/verilator and updated the respecti...

10/25/2011

12:31 pm Verilator Patch #402 (Closed): "force bitvector" attribute
Hi,
I recently verilated our own Network-on-Chip implementation. For interaction between the system and the uut pi...

05/17/2011

09:33 am Verilog-mode Issue #353 (Closed): AUTOARG and SV typedef as port
Hi,
I run in trouble when trying to use the following typedef as port:...

03/21/2011

07:06 pm Verilator Development: Pedantic on warnings
Hi,
in principal I understand, that warnings should always be treated as errors. Nevertheless I have so much legac...

04/14/2010

06:15 pm Verilator Usage: Efficient Usage of Verilog-Parameters
Hi,
is there any efficient way of using verilator parameters?
For my SystemC-Module I would like to instantiate m...

03/18/2010

12:51 pm Verilator Installation: RE: make install
Ah, okay, that might be a reason. I run Ubuntu 9.10 32-bit.
I attached the configure script.
Thanks!
08:48 am Verilator Installation: RE: make install
First of all, thanks for your very fast reply.
I pulled the new version, but it seems the main issue is not in the...

03/17/2010

09:38 pm Verilator Installation: make install
Hi,
I did the following (usual) steps:...

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