Dan Snyder
- Email: Must_Login
- Registered on: 05/24/2010
- Last connection: 06/21/2010
Activity
Reported issues: 1
06/21/2010
- 02:33 pm Verilator Usage: RE: Running Program on Processor
- Thanks for the reference. I've sense determined what I need myself actually. I can run my processor and trace regis...
06/18/2010
- I design a simple single cycle processor which will eventually become superscaler out of order but I'm trying to test...
06/07/2010
- 07:21 pm Verilator Usage: RE: Access Register Without Defining as Input or Output
- Got it, thanks, I'll definitely look into that. For the time being I just needed a quick way to do this to slap toge...
- 06:15 pm Verilator Usage: RE: Access Register Without Defining as Input or Output
- *Ah, I see. Following that change I got the following errors:*
_"../sim_main.cpp:131: error: invalid use of inc... - 05:56 pm Verilator Usage: RE: Access Register Without Defining as Input or Output
- I tried the following referencing you're suggestion:
In C++ file: "@int a = top->Status;@"
In Veri... - 05:34 pm Verilator Usage: RE: Access Register Without Defining as Input or Output
- Sorry for the poor posting form, feel free to ask for a re-post if it's unreadable.
- I'm having trouble accessing a register in my top module. I want to access all registers in my parent module which i...
- 05:18 pm Verilator Usage: RE: Load Array With Binary Contents
- Thanks for the help, I ended up writing a quick C++ program that would take the output of readelf, extract the .text ...
06/03/2010
- 06:40 pm Verilator Usage: RE: Load Array With Binary Contents
- Here's a more specific description of my issue:
I'm trying to figure out how to load a program written in C++ onto... - 05:55 pm Verilator Usage: RE: Load Array With Binary Contents
- Thanks, I'll definitely capture my binary instructions that way.
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