Veripool

02/01/2011

06:47 pm Verilog-mode Using AUTOs: AUTO_TEMPLATE multiple RegEx matches

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01/31/2011

01:13 am Verilog-mode Issue #322: Multiple RegEx matches in Instance Name as part of AUTO_TEMPLATE

Somehow "AT" sign is not appearing in my report. I meant AT[1], where it appears [1].

01:12 am Verilog-mode Issue #322 (Closed): Multiple RegEx matches in Instance Name as part of AUTO_TEMPLATE

Hello:
This is not an issue, but a question or RFE.
Regarding your description below: When using multiple lay...