Verilator

------------------------------------------------------------

making verilator in src

/Library/Developer/CommandLineTools/usr/bin/make -C src 

/Library/Developer/CommandLineTools/usr/bin/make -C obj_dbg -j 1  TGT=../../bin/verilator_bin_dbg VL_DEBUG=1 -f ../Makefile_obj serial

make[2]: Nothing to be done for `serial'.

/Library/Developer/CommandLineTools/usr/bin/make -C obj_dbg       TGT=../../bin/verilator_bin_dbg VL_DEBUG=1 -f ../Makefile_obj

      Compile flags:  g++ -I/usr/local/include -MMD -I. -I.. -I.. -I../../include -I../../include -DYYDEBUG -ggdb -DVL_DEBUG -D_GLIBCXX_DEBUG -MP -Qunused-arguments -faligned-new -Wno-unused-parameter -Wno-undefined-bool-conversion -Wno-shadow -DDEFENV_SYSTEMC="" -DDEFENV_SYSTEMC_ARCH="" -DDEFENV_SYSTEMC_INCLUDE="/Users/echi/App/systemc/include" -DDEFENV_SYSTEMC_LIBDIR="/Users/echi/App/systemc/lib" -DDEFENV_VERILATOR_ROOT="/Users/echi/hobby/cpp/verilator"

/Library/Developer/CommandLineTools/usr/bin/make -C obj_dbg       TGT=../../bin/verilator_coverage_bin_dbg VL_DEBUG=1 VL_VLCOV=1 -f ../Makefile_obj serial_vlcov

make[2]: Nothing to be done for `serial_vlcov'.

/Library/Developer/CommandLineTools/usr/bin/make -C obj_dbg       TGT=../../bin/verilator_coverage_bin_dbg VL_DEBUG=1 VL_VLCOV=1 -f ../Makefile_obj

      Compile flags:  g++ -I/usr/local/include -MMD -I. -I.. -I.. -I../../include -I../../include -DYYDEBUG -ggdb -DVL_DEBUG -D_GLIBCXX_DEBUG -MP -Qunused-arguments -faligned-new -Wno-unused-parameter -Wno-undefined-bool-conversion -Wno-shadow -DDEFENV_SYSTEMC="" -DDEFENV_SYSTEMC_ARCH="" -DDEFENV_SYSTEMC_INCLUDE="/Users/echi/App/systemc/include" -DDEFENV_SYSTEMC_LIBDIR="/Users/echi/App/systemc/lib" -DDEFENV_VERILATOR_ROOT="/Users/echi/hobby/cpp/verilator"

/Library/Developer/CommandLineTools/usr/bin/make -C obj_opt -j 1  TGT=../../bin/verilator_bin -f ../Makefile_obj serial

make[2]: Nothing to be done for `serial'.

/Library/Developer/CommandLineTools/usr/bin/make -C obj_opt       TGT=../../bin/verilator_bin -f ../Makefile_obj

      Compile flags:  g++ -I/usr/local/include -MMD -I. -I.. -I.. -I../../include -I../../include -DYYDEBUG -O2 -MP -Qunused-arguments -faligned-new -Wno-unused-parameter -Wno-undefined-bool-conversion -Wno-shadow -DDEFENV_SYSTEMC="" -DDEFENV_SYSTEMC_ARCH="" -DDEFENV_SYSTEMC_INCLUDE="/Users/echi/App/systemc/include" -DDEFENV_SYSTEMC_LIBDIR="/Users/echi/App/systemc/lib" -DDEFENV_VERILATOR_ROOT="/Users/echi/hobby/cpp/verilator"

test_regress/t/t_a_first_cc.pl

======================================================================

dist/t_a_first_cc: ==================================================

-Skip: dist/t_a_first_cc: scenario 'dist' not enabled for test

dist/t_a_first_cc: %Skip: Skip: scenario 'dist' not enabled for test

test_regress/t/t_a_first_sc.pl

======================================================================

dist/t_a_first_sc: ==================================================

-Skip: dist/t_a_first_sc: scenario 'dist' not enabled for test

dist/t_a_first_sc: %Skip: Skip: scenario 'dist' not enabled for test

for p in examples/* ; do \

	  /Library/Developer/CommandLineTools/usr/bin/make -C $p VERILATOR_ROOT=`pwd` || exit 10; \

	done

-- Verilator hello-world simple example

-- VERILATE ----------------

/Users/echi/hobby/cpp/verilator/bin/verilator -cc --exe top.v sim_main.cpp

-- COMPILE -----------------

/Library/Developer/CommandLineTools/usr/bin/make -j 4 -C obj_dir -f Vtop.mk

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=0 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -c -o sim_main.o ../sim_main.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=0 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -c -o verilated.o /Users/echi/hobby/cpp/verilator/include/verilated.cpp

/usr/bin/perl /Users/echi/hobby/cpp/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vtop.cpp > Vtop__ALLcls.cpp

/usr/bin/perl /Users/echi/hobby/cpp/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vtop__Syms.cpp > Vtop__ALLsup.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=0 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -c -o Vtop__ALLsup.o Vtop__ALLsup.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=0 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -c -o Vtop__ALLcls.o Vtop__ALLcls.cpp

      Archiving Vtop__ALL.a ...

ar r Vtop__ALL.a Vtop__ALLcls.o Vtop__ALLsup.o

ar: creating archive Vtop__ALL.a

ranlib Vtop__ALL.a

g++    sim_main.o verilated.o Vtop__ALL.a    -o Vtop -lm -lstdc++ 

-- RUN ---------------------

obj_dir/Vtop

Hello World!

- top.v:10: Verilog $finish

-- DONE --------------------

Note: Once this example is understood, see examples/tracing_c.

Note: Also see the EXAMPLE section in the verilator manpage/document.

-- Verilator hello-world simple example

-- VERILATE ----------------

/Users/echi/hobby/cpp/verilator/bin/verilator -sc --exe top.v sc_main.cpp

-- COMPILE -----------------

/Library/Developer/CommandLineTools/usr/bin/make -j 4 -C obj_dir -f Vtop.mk

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=1 -DVM_TRACE=0 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include  -c -o sc_main.o ../sc_main.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=1 -DVM_TRACE=0 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include  -c -o verilated.o /Users/echi/hobby/cpp/verilator/include/verilated.cpp

/usr/bin/perl /Users/echi/hobby/cpp/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vtop.cpp > Vtop__ALLcls.cpp

/usr/bin/perl /Users/echi/hobby/cpp/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vtop__Syms.cpp > Vtop__ALLsup.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=1 -DVM_TRACE=0 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include  -c -o Vtop__ALLcls.o Vtop__ALLcls.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=1 -DVM_TRACE=0 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include  -c -o Vtop__ALLsup.o Vtop__ALLsup.cpp

      Archiving Vtop__ALL.a ...

ar r Vtop__ALL.a Vtop__ALLcls.o Vtop__ALLsup.o

ar: creating archive Vtop__ALL.a

ranlib Vtop__ALL.a

g++     -L/Users/echi/App/systemc/lib sc_main.o verilated.o Vtop__ALL.a    -o Vtop -lm -lstdc++ -lsystemc

-- RUN ---------------------

obj_dir/Vtop

Hello World!

- top.v:10: Verilog $finish

-- DONE --------------------

Note: Once this example is understood, see examples/tracing_sc.

Note: Also see the EXAMPLE section in the verilator manpage/document.

-- Verilator tracing example

-- VERILATE ----------------

/Users/echi/hobby/cpp/verilator/bin/verilator  -cc --exe -O2 -x-assign 0 -Wall --trace --assert --coverage -f input.vc top.v sim_main.cpp

-- COMPILE -----------------

/Library/Developer/CommandLineTools/usr/bin/make -j 4 -C obj_dir -f ../Makefile_obj

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow      -MMD -MP -DVL_DEBUG=1 -O2 -fstrict-aliasing -c -o sim_main.o ../sim_main.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow      -MMD -MP -DVL_DEBUG=1 -O2 -fstrict-aliasing -c -o verilated.o /Users/echi/hobby/cpp/verilator/include/verilated.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow      -MMD -MP -DVL_DEBUG=1 -O2 -fstrict-aliasing -c -o verilated_cov.o /Users/echi/hobby/cpp/verilator/include/verilated_cov.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow      -MMD -MP -DVL_DEBUG=1 -O2 -fstrict-aliasing -c -o verilated_vcd_c.o /Users/echi/hobby/cpp/verilator/include/verilated_vcd_c.cpp

/usr/bin/perl /Users/echi/hobby/cpp/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vtop.cpp > Vtop__ALLcls.cpp

/usr/bin/perl /Users/echi/hobby/cpp/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vtop__Trace.cpp Vtop__Syms.cpp Vtop__Trace__Slow.cpp > Vtop__ALLsup.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow      -MMD -MP -DVL_DEBUG=1 -O2 -fstrict-aliasing -c -o Vtop__ALLcls.o Vtop__ALLcls.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow      -MMD -MP -DVL_DEBUG=1  -c -o Vtop__ALLsup.o Vtop__ALLsup.cpp

      Archiving Vtop__ALL.a ...

ar r Vtop__ALL.a Vtop__ALLcls.o Vtop__ALLsup.o

ar: creating archive Vtop__ALL.a

ranlib Vtop__ALL.a

g++    sim_main.o verilated.o verilated_cov.o verilated_vcd_c.o Vtop__ALL.a    -o Vtop -lm -lstdc++ 

-- RUN ---------------------

obj_dir/Vtop +trace

Enabling waves into logs/vlt_dump.vcd...

[1] Model running...

[1] clk=0 rstl=1 iquad=1246 -> oquad=1247 owide=3_22222222_11111112

[2] clk=0 rstl=0 iquad=1258 -> oquad=0 owide=0_00000000_00000000

[3] clk=1 rstl=0 iquad=126a -> oquad=0 owide=0_00000000_00000000

[4] clk=1 rstl=0 iquad=127c -> oquad=0 owide=0_00000000_00000000

[5] clk=1 rstl=0 iquad=128e -> oquad=0 owide=0_00000000_00000000

[6] clk=1 rstl=0 iquad=12a0 -> oquad=0 owide=0_00000000_00000000

[7] clk=1 rstl=0 iquad=12b2 -> oquad=0 owide=0_00000000_00000000

[8] clk=0 rstl=0 iquad=12c4 -> oquad=0 owide=0_00000000_00000000

[9] clk=0 rstl=0 iquad=12d6 -> oquad=0 owide=0_00000000_00000000

[10] clk=0 rstl=1 iquad=12e8 -> oquad=12e9 owide=3_22222222_11111112

[11] clk=0 rstl=1 iquad=12fa -> oquad=12fb owide=3_22222222_11111112

[12] clk=0 rstl=1 iquad=130c -> oquad=130d owide=3_22222222_11111112

[13] clk=1 rstl=1 iquad=131e -> oquad=131f owide=3_22222222_11111112

[14] clk=1 rstl=1 iquad=1330 -> oquad=1331 owide=3_22222222_11111112

[15] clk=1 rstl=1 iquad=1342 -> oquad=1343 owide=3_22222222_11111112

[16] clk=1 rstl=1 iquad=1354 -> oquad=1355 owide=3_22222222_11111112

[17] clk=1 rstl=1 iquad=1366 -> oquad=1367 owide=3_22222222_11111112

[18] clk=0 rstl=1 iquad=1378 -> oquad=1379 owide=3_22222222_11111112

[19] clk=0 rstl=1 iquad=138a -> oquad=138b owide=3_22222222_11111112

[20] clk=0 rstl=1 iquad=139c -> oquad=139d owide=3_22222222_11111112

[21] clk=0 rstl=1 iquad=13ae -> oquad=13af owide=3_22222222_11111112

[22] clk=0 rstl=1 iquad=13c0 -> oquad=13c1 owide=3_22222222_11111112

[23] clk=1 rstl=1 iquad=13d2 -> oquad=13d3 owide=3_22222222_11111112

[24] clk=1 rstl=1 iquad=13e4 -> oquad=13e5 owide=3_22222222_11111112

[25] clk=1 rstl=1 iquad=13f6 -> oquad=13f7 owide=3_22222222_11111112

[26] clk=1 rstl=1 iquad=1408 -> oquad=1409 owide=3_22222222_11111112

[27] clk=1 rstl=1 iquad=141a -> oquad=141b owide=3_22222222_11111112

[28] clk=0 rstl=1 iquad=142c -> oquad=142d owide=3_22222222_11111112

[29] clk=0 rstl=1 iquad=143e -> oquad=143f owide=3_22222222_11111112

[30] clk=0 rstl=1 iquad=1450 -> oquad=1451 owide=3_22222222_11111112

[31] clk=0 rstl=1 iquad=1462 -> oquad=1463 owide=3_22222222_11111112

[32] clk=0 rstl=1 iquad=1474 -> oquad=1475 owide=3_22222222_11111112

[33] clk=1 rstl=1 iquad=1486 -> oquad=1487 owide=3_22222222_11111112

[34] clk=1 rstl=1 iquad=1498 -> oquad=1499 owide=3_22222222_11111112

[35] clk=1 rstl=1 iquad=14aa -> oquad=14ab owide=3_22222222_11111112

[36] clk=1 rstl=1 iquad=14bc -> oquad=14bd owide=3_22222222_11111112

[37] clk=1 rstl=1 iquad=14ce -> oquad=14cf owide=3_22222222_11111112

[38] clk=0 rstl=1 iquad=14e0 -> oquad=14e1 owide=3_22222222_11111112

[39] clk=0 rstl=1 iquad=14f2 -> oquad=14f3 owide=3_22222222_11111112

[40] clk=0 rstl=1 iquad=1504 -> oquad=1505 owide=3_22222222_11111112

[41] clk=0 rstl=1 iquad=1516 -> oquad=1517 owide=3_22222222_11111112

[42] clk=0 rstl=1 iquad=1528 -> oquad=1529 owide=3_22222222_11111112

[43] fastclk is 5 times faster than clk

*-* All Finished *-*

- sub.v:45: Verilog $finish

[43] clk=1 rstl=1 iquad=153a -> oquad=153b owide=3_22222222_11111112

-- COVERAGE ----------------

/Users/echi/hobby/cpp/verilator/bin/verilator_coverage --annotate logs/annotated logs/coverage.dat

Total coverage (8/20) 40.00%

See lines with '%00' in logs/annotated

-- DONE --------------------

To see waveforms, open vlt_dump.vcd in a waveform viewer

-- Verilator tracing example

-- VERILATE ----------------

/Users/echi/hobby/cpp/verilator/bin/verilator  -sc --exe -O2 -x-assign 0 -Wall --trace --assert --coverage -f input.vc top.v sc_main.cpp

-- COMPILE ----------------=

/Library/Developer/CommandLineTools/usr/bin/make -j 4 -C obj_dir -f ../Makefile_obj

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=1 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include -MMD -MP -DVL_DEBUG=1 -Wno-deprecated -O2 -fstrict-aliasing -c -o sc_main.o ../sc_main.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=1 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include -MMD -MP -DVL_DEBUG=1 -Wno-deprecated -O2 -fstrict-aliasing -c -o verilated.o /Users/echi/hobby/cpp/verilator/include/verilated.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=1 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include -MMD -MP -DVL_DEBUG=1 -Wno-deprecated -O2 -fstrict-aliasing -c -o verilated_cov.o /Users/echi/hobby/cpp/verilator/include/verilated_cov.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=1 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include -MMD -MP -DVL_DEBUG=1 -Wno-deprecated -O2 -fstrict-aliasing -c -o verilated_vcd_c.o /Users/echi/hobby/cpp/verilator/include/verilated_vcd_c.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=1 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include -MMD -MP -DVL_DEBUG=1 -Wno-deprecated -O2 -fstrict-aliasing -c -o verilated_vcd_sc.o /Users/echi/hobby/cpp/verilator/include/verilated_vcd_sc.cpp

/usr/bin/perl /Users/echi/hobby/cpp/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vtop.cpp > Vtop__ALLcls.cpp

/usr/bin/perl /Users/echi/hobby/cpp/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vtop__Trace.cpp Vtop__Syms.cpp Vtop__Trace__Slow.cpp > Vtop__ALLsup.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=1 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include -MMD -MP -DVL_DEBUG=1 -Wno-deprecated -O2 -fstrict-aliasing -c -o Vtop__ALLcls.o Vtop__ALLcls.cpp

g++  -I.  -MMD -I/Users/echi/hobby/cpp/verilator/include -I/Users/echi/hobby/cpp/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=1 -DVM_SC=1 -DVM_TRACE=1 -faligned-new -fbracket-depth=4096 -Qunused-arguments -Wno-parentheses-equality -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -I/Users/echi/App/systemc/include -MMD -MP -DVL_DEBUG=1 -Wno-deprecated  -c -o Vtop__ALLsup.o Vtop__ALLsup.cpp

      Archiving Vtop__ALL.a ...

ar r Vtop__ALL.a Vtop__ALLcls.o Vtop__ALLsup.o

ar: creating archive Vtop__ALL.a

ranlib Vtop__ALL.a

g++     -L/Users/echi/App/systemc/lib sc_main.o verilated.o verilated_cov.o verilated_vcd_c.o verilated_vcd_sc.o Vtop__ALL.a    -o Vtop -lm -lstdc++ -lsystemc

-- RUN ---------------------

obj_dir/Vtop +trace

[0] Model running...

Enabling waves into logs/vlt_dump.vcd...

[43] fastclk is 5 times faster than clk

*-* All Finished *-*

- sub.v:45: Verilog $finish

-- COVERAGE ----------------

/Users/echi/hobby/cpp/verilator/bin/verilator_coverage --annotate logs/annotated logs/coverage.dat

Total coverage (6/20) 30.00%

See lines with '%00' in logs/annotated

-- DONE --------------------

To see waveforms, open vlt_dump.vcd in a waveform viewer

/Library/Developer/CommandLineTools/usr/bin/make -C test_regress

/usr/bin/perl driver.pl -j 0 --vlt --vltmt --dist

driver.pl: Found 8 cores, using -j 9

== Many jobs; redirecting STDIN

======================================================================

dist/t_EXAMPLE: ==================================================

-Skip: dist/t_EXAMPLE: scenario 'dist' not enabled for test

dist/t_EXAMPLE: %Skip: Skip: scenario 'dist' not enabled for test

Tests passed!

Now type 'make install' to install.

Or type 'make' inside an examples subdirectory.