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Verilog::Regex

Added by Utkarsh Khanna 6 days ago

Is there a Regex file where there are patterns for pins and modules. I want to know how does this module knows that this thing is a module and this is a wire or net , etc.


Replies (2)

RE: Verilog::Regex - Added by Wilson Snyder 5 days ago

It uses a parser. The internals aren't something I'd like to spend time explaining, please read the sources yourself if you want to know how it works.

RE: Verilog::Regex - Added by Utkarsh Khanna 5 days ago

Which parser may i know?

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