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Finding signal width(size) on every port from .sig files compare to .v files

Added by M Ben 6 months ago

Hello hi, it's quite difficult for me to understand the callback usage and how to use it. What I want to do is to parse the .sig file, and compare the signal size if it's matching or not to the .v (top level) which in this files there will be parameters that need to be used. The parameters would be like

parameter crystal_size1 = 4, parameter pll_crystal_2 = 3, parameter width1 = 10

and these parameters need to be used when reading the .sv files which all signal size is defined,

reg[3:0] signal_1 reg[width1*4:0] signal_2

In the .sig files there will be,

signal_1[3:0] signal_2[40:0]

So when we compare this signals size (.sig compared to .sv but need to go through .v first to read the parameters), we know that all signal matched each other size.

Thanks in advance!


Replies (7)

RE: Finding signal width(size) on every port from .sig files compare to .v files - Added by Wilson Snyder 6 months ago

To do what you want you need to elaborate, Verilog-Perl does not do elaboration.

For your application I'd suggest verilator with --xml output. Then parse the XML in your application.

For more info see https://www.veripool.org/projects/verilog-perl/wiki/Manual-verilog-perl#WHICH-PARSER-PACKAGE

RE: Finding signal width(size) on every port from .sig files compare to .v files - Added by M Ben 6 months ago

I tried to install Verilator by using local environment, and when "make" is initiated, this error exist

 

In file included from V3Lexer_pregen.yy.cpp:245:0,
                 from ../V3ParseLex.cpp:36:
/usr/include/FlexLexer.h:130:14: error: expected unqualified-id before numeric constant
In file included from ../V3ParseLex.cpp:36:0:
V3Lexer_pregen.yy.cpp: In member function ‘virtual int V3LexerBase::yylex()’:
V3Lexer_pregen.yy.cpp:3371:10: error: ‘yy_current_buffer’ was not declared in this scope
In file included from ../V3ParseLex.cpp:36:0:
V3Lexer_pregen.yy.cpp:6922:8: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp:6945:23: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In constructor ‘V3LexerBase::V3LexerBase(std::istream*, std::ostream*)’:
V3Lexer_pregen.yy.cpp:7062:2: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In destructor ‘virtual V3LexerBase::~V3LexerBase()’:
V3Lexer_pregen.yy.cpp:7074:20: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘virtual void V3LexerBase::switch_streams(std::istream*, std::ostream*)’:
V3Lexer_pregen.yy.cpp:7081:21: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘int V3LexerBase::yy_get_next_buffer()’:
V3Lexer_pregen.yy.cpp:7134:24: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘void V3LexerBase::yyunput(int, char*)’:
V3Lexer_pregen.yy.cpp:7329:15: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘int V3LexerBase::yyinput()’:
V3Lexer_pregen.yy.cpp:7371:22: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘virtual void V3LexerBase::yyrestart(std::istream*)’:
V3Lexer_pregen.yy.cpp:7430:9: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp:7433:18: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘virtual void V3LexerBase::yy_switch_to_buffer(YY_BUFFER_STATE)’:
V3Lexer_pregen.yy.cpp:7440:7: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp:7443:7: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp:7451:2: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘void V3LexerBase::yy_load_buffer_state()’:
V3Lexer_pregen.yy.cpp:7465:15: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘virtual void V3LexerBase::yy_delete_buffer(YY_BUFFER_STATE)’:
V3Lexer_pregen.yy.cpp:7502:12: error: ‘yy_current_buffer’ was not declared in this scope
V3Lexer_pregen.yy.cpp: In member function ‘void V3LexerBase::yy_flush_buffer(YY_BUFFER_STATE)’:
V3Lexer_pregen.yy.cpp:7544:12: error: ‘yy_current_buffer’ was not declared in this scope
make[2]: *** [V3ParseLex.o] 
Error 1 make: *** [verilator_exe] Error 2

I google it but doesn't seems to give any solution and fixed.

RE: Finding signal width(size) on every port from .sig files compare to .v files - Added by Wilson Snyder 6 months ago

Please indicate your operating system, OS version, and version of flex (flex --version). Very likely your flex is old/broken.

RE: Finding signal width(size) on every port from .sig files compare to .v files - Added by M Ben 5 months ago

flex version 2.5.4. I dont have root access if the files need modification, any way to fix this?

RE: Finding signal width(size) on every port from .sig files compare to .v files - Added by Wilson Snyder 5 months ago

2.5.4 is 20 years old! While you can always install flex yourself without root, the reality is using 20 year old OS will be continual problems. Use something newer, e.g. Ubuntu 2014.04 is about the oldest that we run regressions on.

RE: Finding signal width(size) on every port from .sig files compare to .v files - Added by M Ben 5 months ago

I see, after setup Flex locally, how to run the makefile using my own installed Flex?

RE: Finding signal width(size) on every port from .sig files compare to .v files - Added by Wilson Snyder 5 months ago

Have flex in your path then ./configure and make

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