Converting VCD file to LXT file during simulation
I found a way to convert the VCD file output by Verilator to an LXT2 file during the simulation. This substantially reduced the size of the LXT file and used the multi-core capability of the CPU so that the conversion did not impact the Verilator simulation time.
1. Within the SystemPerl distribution, in src/SpTraceVcdC.cpp, add "|O_NONBLOCK" to the "m_fd = ::open" instruction.
2. If your VCD output file name is "vl_dump.vcd", type the following command (this only needs to be done once):
3. Every time your run the simulation, type the following two commands:
vcd2lxt2 vl_dump.vcd vl_dump.lxt & time obj_dir/Vxxx ls -lh vl_dump.*
This uses a "named pipe", see "man mkfifo", so that the output to the vl_dump.vcd file from Verilator goes through a pipe to the vcd2lxt2 program instead of going to the disk. The O_NONBLOCK allows the simulation and vcd2lxt2 programs to run simultaneously at full speed. In practice, the vcd2lxt2 program uses 10% to 50% of one core while the Verilator simulation uses close to 100% of another core. Also, gtkwave reads the smaller LXT files faster than the VCD files and anecdotally crashes less often when the waveform is refreshed in the middle of a simulation.
vcd2lxt2 is part of gtkwave.
Nice. I'll put O_NONBLOCK into the next SystemPerl release.
Another nice trick so that you don't have to type the "vcd2lxt2 ..." command multiple times:
( for (( ;; )); do vcd2lxt2 vl_dump.vcd vl_dump.lxt; done ) &
Do this once from the shell. Thereafter, it will recreate the LXT file every time you re-run the sim. If you turn of the VCD output, it will do nothing (as the FIFO doesn't have new data going into it).