interface modport expression
Is there a plan for verilator to support modport expressions?
Example from -> http://www.asic-world.com/systemverilog/interface4.html
//+++++++++++++++++++++++++++++++++++++++++++++++++ // Define the interface //+++++++++++++++++++++++++++++++++++++++++++++++++ interface arb_if #(num_agents = 1) (input clk); logic reset; logic [num_agents-1 : 0] req; logic [num_agents-1 : 0] gnt; //================================================= // Modport inside a generate block //================================================= for (genvar i=0; i< num_agents; i++) begin: arb modport arb (input .creq (req[i], clk, reset, output .cgnt (gnt[i]) ); modport tb (output .creq (req[i], input clk, reset, .cgnt (gnt[i]) ); end endinterface
RE: interface modport expression - Added by Wilson Snyder almost 5 years ago
Not presently as that's not a common syntax, but we always welcome patches!
RE: interface modport expression - Added by Edmond Cote almost 5 years ago
Not a common syntax, but required syntax for SV-Design in my option.
I wouldn't rule out writing a patch, but my time is constrained. There might also be the option for us to pay someone to do this. Timeframe being this summer. Is there anyone you could think of to provide this service?
RE: interface modport expression - Added by Bob Kitchin over 1 year ago
I would like to 2nd this motion. Modports Expressions, let alone Modports, aren't particularly common. But the project I'm on uses them. Unfortunately I can't modify the source, since its release code that's already in an ASIC. So I'm stuck using a free version of Modelsim.