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scr1 test-bench in verilator

Added by Joel Holdsworth over 1 year ago

Hi Folks,

I'm just working on a little project to get the scr1 (https://github.com/syntacore/scr1) RISC-V core test-bench ported over to Verilator.

In so doing, I've run into a few bugs and missing features in Verilator. It's pretty close to working - with the exception of a handful of bugs, which I've got test-cases for:

  • https://www.veripool.org/issues/1285-Verilator-scr1-test-suite-built-in-system-functions-only-work-when-the-return-value-is-assigned
  • https://www.veripool.org/issues/1286-Verilator-scr1-test-suite-processing-passes-get-stuck-and-allocate-huge-amounts-of-system-RAM-when-verilog-contains-memory-blocks
  • https://www.veripool.org/issues/1287-Verilator-scr1-test-suite-SystemVerilog-nested-blocks-are-not-supported
  • https://www.veripool.org/issues/1288-Verilator-scr1-test-suite-In-some-cases-mixed-assignment-to-struct-member-fails
  • https://www.veripool.org/issues/1289-Verilator-scr1-test-suite-string-hextoa-is-not-implemented

Would it be possible for someone knowledgeable to have a look at each of these and give me some ideas about the effort involved in fixing these things? 1289 looks pretty trivial to fix; the rest I'm not certain how difficult these would be to solve. Of course the main authors of Verilator will be able to fix these things most easily - but if they're not going to be able to work on these things in the short term, I'm happy to take a look if I can get some pointers on where in the code I should be looking, and whether a fix is likely to be feasible without making major changes to the design.

Overall, I'm seriously impressed by Verilator's support for SystemVerilog - I was expecting it to be much worse. So kudos to everyone working on it.

Joel Holdsworth


Replies (3)

RE: scr1 test-bench in verilator - Added by Wilson Snyder over 1 year ago

Great, thanks for your testing effort. I updated the bugs with the details and fixed one. Please post comments related to each under the appropriate bug.

RE: scr1 test-bench in verilator - Added by Joel Holdsworth over 1 year ago

Just added another one:

  • https://www.veripool.org/issues/1290-Verilator-scr1-test-suite-assert-properties-don-t-work

RE: scr1 test-bench in verilator - Added by Joel Holdsworth over 1 year ago

And another:

  • https://www.veripool.org/issues/1291-Verilator-scr1-test-suite-delayed-always-blocks-are-unsupported
    (1-3/3)