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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2016-09-06T11:34:17Z
It means you have two (or more) instances creating an output e.g. "output [1] example" and "output [6] example", and when verilog-mode makes a AUTOWIRE for "example" it can't make a declaration e.g. "wire [1,6] example" is not legal or not easy to figure out. Manually declare the wire.
Author Name: John John John
Original Redmine Message: 1984 from https://www.veripool.org
Hello,
I'm receiving the "Couldn't Merge" message on the AUTOREGINPUT - why? How to solve? Why happens? What exactly "couldn't Merge"?
Thank you!
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