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Issue #1088

Wide number with small value

Added by Mandy Xu 7 months ago. Updated 5 months ago.

Status:
Closed
Priority:
Normal
Assignee:
Category:
Unsupported
% Done:

0%


Description

Follow up on thread: http://www.veripool.org/boards/3/topics/1886?r=2006#message-2006

Hi Wilson, thanks for the fix and sorry for bothering again -- more cases on this "wide number with small value"

So right now if it's a parameter/localparam [95:0], then there seems no problem, but if it's a reg, wire, or function, then we will get the same error about shifting over 32-bit number. I tried simplifying the cases and created the following small modules, test_funciton, test_reg, test_wire, and test_param -> test_param can pass. There may be other cases but these are the ones I could see verilator is complaining about right now. Test file containing these modules also attached. Again thanks so much for all the help!

Mandy

module test_function #()();
    localparam [32:0] M = 4 ;
    function [M:0] gen_matrix;
        gen_matrix[0] = 1>> M;
    endfunction
 endmodule // test_function
module test_reg #(parameter[95:0] P = 1)(input clk);
     reg [95: 0] lfsr = 0;            
     always @(posedge clk) begin
       // lfsr <= {^(lfsr & (1 >> P * 16)), lfsr[M-1:1]} ^ lfsr;
        lfsr <= (1 >> P);
     end
endmodule // test_reg
module test_wire #(parameter[95:0] P = 1)(input clk);
   wire [95: 0] lfsr = 1 >> P;  
endmodule // test_wire
module test_param_pass #(parameter[95:0] P = 1)(input clk);
   localparam [95: 0] lfsr = 1 >> P;  
endmodule // test_param

test_unsupported.v (674 Bytes) Mandy Xu, 09/13/2016 04:10 PM

test_seg_fault.v (1.23 KB) Mandy Xu, 09/15/2016 07:51 PM

History

#1 Updated by Wilson Snyder 6 months ago

  • Category set to Unsupported
  • Status changed from New to Resolved
  • Assignee set to Wilson Snyder

Fixed in git towards 3.888. (I suspect this will make a new problem pop up, but at least it's progress.)

#2 Updated by Mandy Xu 6 months ago

Thanks!

Yeah I just had a try.

The width problem is solved but then it raised some seg fault internal error (yeah new problem as you suggested). By enabling debug message I could see something I saw before if I hard code the width range in V3Wdith.cpp from 32 to 96.

eg.

V3Unroll.cpp:75: Can't Unroll: non-constant initializer :WHILE 0x11006440 <e292184> {g170}

- V3Unroll.cpp:215: Unable to simulate

- V3Unroll.cpp:75: Can't Unroll: Unable to simulate loop :WHILE 0x110353c0 <e172881> {p44}

- V3Simulate.h:215: Unknown node type in SimulateVisitor: WHILE

There are quite a few messages like these. This may or may not be the reason why it crashes. I am not sure whether because they are actually not errors but some debug messages.

Part of the backtrace for the seg fault is as the following. I'll continue investigating and try to narrow down the issue, but any ideas/thought on this would be much appreciated. I'll let you know and file another issue when I have more clues. Thanks a lot :)

Program received signal SIGSEGV, Segmentation fault.

0x0000000000434586 in AstConst::toSInt (this=0x0) at ../V3AstNodes.h:96

96 vlsint32_t toSInt() const { return num().toSInt(); }

#0 0x0000000000434586 in AstConst::toSInt (this=0x0) at ../V3AstNodes.h:96

#1 0x000000000046e88c in AstSel::widthConst (this=0x119bc6c0) at ../V3AstNodes.h:897

#2 0x0000000000521957 in ExpandVisitor::visit (this=0x7fffffffd870, nodep=0x119bc6c0) at ../V3Expand.cpp:354

#3 0x000000000043714b in AstSel::accept (this=0x119bc6c0, v=..., vup=0x0) at ../V3AstNodes.h:877

#4 0x000000000042753c in AstNode::iterateAndNext (this=0x119bc6c0, v=..., vup=0x0) at ../V3Ast.cpp:776

#5 0x0000000000427252 in AstNode::iterateChildren (this=0x119bc500, v=..., vup=0x0) at ../V3Ast.cpp:742

#6 0x0000000000527230 in ExpandVisitor::visit (this=0x7fffffffd870, nodep=0x119bc500) at ../V3Expand.cpp:919

......

#49 0x00000000004059f8 in process () at ../Verilator.cpp:468

#50 0x000000000040661f in main (argc=14, argv=0x7fffffffdd38, env=0x7fffffffddb0) at ../Verilator.cpp:604

#3 Updated by Wilson Snyder 6 months ago

  • Status changed from Resolved to AskedReporter

Probably related, but not the code I touched.

Please run with --debug, look at the generated .tree file with the highest number and search for 0x119bc6c0 (the nodep in the backtrace), and attach it. This file will also say the source file as a letter and line number, so also attach the verilog that causes it, ideally as a standalone test.

#4 Updated by Mandy Xu 6 months ago

Ok though I am still in a kind of confusing state, I try my best to minimize the code that will reproduce this seg fault. The module below needs some extra definition so please try the attached file when testing. I'm only listing the module here to explain what I've found so far

module test_seg_fault  #(
    parameter [`BCH_PARAM_SZ-1:0] P = `BCH_SANE
) (
    input clk,
    input start,
    input [`BCH_SYNDROMES_SZ(P)-1:0] syndromes,
    output [`BCH_SIGMA_SZ(P)-1:0] sigma,
    output reg [`BCH_ERR_SZ(P)-1:0] err_count = 0
    );
   localparam TCQ = 1;
   localparam M = `BCH_M(P);
   wire [M-1:0]             syn1 = syndromes[0+:M];
   always @(posedge clk) begin
      if (start) begin
     err_count <= #TCQ {{`BCH_ERR_SZ(P)-1{1'b0}}, |syn1};
      end
   end // always @ (posedge clk)
endmodule // test_seg_fault

It appears to me the seg fault raised from

err_count <= #TCQ {{`BCH_ERR_SZ(P)-1{1'b0}}, |syn1};

because if I comment out this line, then the error goes away.

I am not exactly sure what cause this so this might be simplified further -- I just don't know how to properly do it so it won't generate extra warning/error. At this moment I already need to add -Wno-WIDTH to suppress some width warnings. It might still relate to the 96 wide number problem because if I change

localparam M = `BCH_M(P);

to

localparam M = 1;

then the seg fault goes away. The backtrace is similar:

Program received signal SIGSEGV, Segmentation fault.
0x0000000000434586 in AstConst::toSInt (this=0x0) at ../V3AstNodes.h:96
96        vlsint32_t toSInt()  const { return num().toSInt(); }
#0  0x0000000000434586 in AstConst::toSInt (this=0x0) at ../V3AstNodes.h:96
#1  0x000000000046e88c in AstSel::widthConst (this=0xb10850) at ../V3AstNodes.h:897
#2  0x0000000000521957 in ExpandVisitor::visit (this=0x7fffffffd650, nodep=0xb10850) at ../V3Expand.cpp:354
#3  0x000000000043714b in AstSel::accept (this=0xb10850, v=..., vup=0x0) at ../V3AstNodes.h:877

and 0xb10850 is

1:2:3:2:1:1:1:2: SEL 0xb10850 &lt;e5046&gt; {d36} dt=0xb19a60(G/wu32/4) decl[7:0]]

line 36 is

wire [M-1:0] syn1 = syndromes[0+:M]; (if you look at the file test_seg_fault.v)

After I found this, I tried changing it to

wire [M-1:0]             syn1 = syndromes[0+:8];

then the seg fault goes away as well.

BTW I didn't see this generates the unroll message about WHILE, so that might be something else. Under investigation

Thanks, Mandy

#5 Updated by Wilson Snyder 6 months ago

  • Status changed from AskedReporter to Resolved

Fixed in git, again.

BTW these will all work if the parameters are e.g "parameter integer FOO = ...".

#6 Updated by Mandy Xu 6 months ago

Wilson Snyder wrote:

Fixed in git, again.

BTW these will all work if the parameters are e.g "parameter integer FOO = ...".

Thanks for the fix and the tips! The code can be verilated now, I disable a lot of warninga though... But big progress and many thanks :)

I think the "cannot unroll WHILE" is still there if enable -debug option, but at this moment it doesn't bother much. I'll file another issue if something becomes serious in the future and I couldn't figure it out myself. Again thanks!

#7 Updated by Wilson Snyder 5 months ago

  • Status changed from Resolved to Closed

In 3.888 (on 2016-10-14).

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