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Issue #1160

Understand few defconsts

Added by Kaushal Modi over 2 years ago. Updated over 2 years ago.

Status:
Confirmed
Priority:
Normal
Assignee:
-
Category:
Documentation
% Done:

0%


Description

Hi,

I was working on refactoring verilog-prettify-expr function and I came across the verilog-basic-complete-re and verilog-complete-reg variables.

These are defconst variables but they are lacking docstrings. So just looking at their values, I cannot tell what they mean..

Also, for consistency, should verilog-complete-reg have been named verilog-complete-re?

Looking at verilog-basic-complete-re:

(defconst verilog-basic-complete-re
  (eval-when-compile
    (verilog-regexp-words
     `(
       "always" "assign" "always_latch" "always_ff" "always_comb" "constraint" 
       "import" "initial" "final" "module" "macromodule" "repeat" "randcase" "while" 
       "if" "for" "forever" "foreach" "else" "parameter" "do" "localparam" "assert" 
       ))))

At first glance, this seems to be a regexp for procedural blocks, but then it does not contain final (IEEE 1800-2012 Section 9.2). Then it has module, but no class. So I couldn't correlate this set of keywords with any given set in the standard.

  • Do we need to add more keywords to this regexp?
  • A docstring will help tremendously.

History

#1 Updated by Wilson Snyder over 2 years ago

  • Category set to Documentation
  • Status changed from New to Confirmed

I can't personally advise as its not my code, but welcome a patch to improve the docs after you figure it out!

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