Is it possible to make "begin" keyword align with case expression?
We have coding style required the "begin" keyword has to align with the case expression:Expected:
case(sel) 0: begin dout <= a; end .... endcaseBut the verilog-mode always indent the "begin" as below:
case(sel) 0: begin dout <= a; end .... endcase
#1 Updated by Wilson Snyder about 2 years ago
- Category set to Indents
- Status changed from New to Feature
I don't believe there is presently a setting for this.
Note the indentation code is mostly maintained/improved as patches are contributed. So, perhaps you would like to consider contributing a patch for this?
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