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Plusargs verilog compilation #1181

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veripoolbot opened this issue Jul 7, 2017 · 14 comments
Closed

Plusargs verilog compilation #1181

veripoolbot opened this issue Jul 7, 2017 · 14 comments
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resolution: fixed Closed; fixed

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Author Name: Thomas J Whatson
Original Redmine Issue: 1181 from https://www.veripool.org


Dear Community

I've got a compilation error with the following message:

main.o: In function VL_VALUEPLUSARGS_IQ(int, char const*, char, unsigned long&)': main.cpp:(.text._Z19VL_VALUEPLUSARGS_IQiPKccRm[VL_VALUEPLUSARGS_IQ(int, char const*, char, unsigned long&)]+0x2a): undefined reference to VL_VALUEPLUSARGS_IW(int, char const*, char, unsigned int*)'
collect2: error: ld returned 1 exit status

I use Verilog $value$plusargs task to pass extra parameters during simulation.
I use the latest Verilog Perl and SystemPerl. Veriloator is verilator_3_906-7-g70daadf.
The system is Ubuntu 14.04 64 bit with GCC 7.1

I had NO this issue in 3.902 version. Pls fix this

Thank you

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2017-07-07T11:50:50Z


VL_VALUEPLUSARGS_IW should no longer be used; it's somewhat surprising the compiler is complaining, but I removed the old functions from verilated.cpp, please try the git head.

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Original Redmine Comment
Author Name: Thomas J Whatson
Original Date: 2017-07-07T14:24:07Z


Hi Wilson

Thanks for a prompt update. I rebuilt Verilator from master after your latest commit. Now got another error:

../main.cpp: In function ‘int main(int, char**, char**)’:
../main.cpp:40:6: error: ‘VL_VALUEPLUSARGS_II’ was not declared in this scope
if (VL_VALUEPLUSARGS_II(32 ,"randseed=",'d', randomSeed))
^~~~~~~~~~~~~~~~~~~

../main.cpp:40:6: note: suggested alternative: ‘VL_VALUEPLUSARGS_INI’
if (VL_VALUEPLUSARGS_II(32 ,"randseed=",'d', randomSeed))

Compiler is GCC 7.1 under Ubuntu 14.04.5

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Original Redmine Comment
Author Name: Thomas J Whatson
Original Date: 2017-07-07T14:31:59Z


NOTE:

This is NOT a compile error. I built Verilator seamlessly. I get this error when I compile my RTL and trying to run the simulation

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2017-07-07T14:56:03Z


I suspect you are verilating with one version of verilator, then compiling that output pointing at a different version's includes.

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Original Redmine Comment
Author Name: Thomas J Whatson
Original Date: 2017-07-07T16:00:14Z


Hi Wilson

Wrong assumption. Do you want me to upload my Verilator build ?

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Original Redmine Comment
Author Name: Thomas J Whatson
Original Date: 2017-07-07T16:01:36Z


I've been using Verilator for ages with the same Makefile and have no issues with verilator_3_902

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2017-07-07T17:06:04Z


There is no longer any occurrence of VL_VALUEPLUSARGS_IQ in the verilator sources, and the internal tests that use plusargs work. Therefore I am presuming there's something wrong in your setup, perhaps picking up an older version.

However perhaps I'm missing something, and if you can modify the test_regress/t/t_sys_plusargs.v to show the problem, I'll fix it.

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Original Redmine Comment
Author Name: Thomas J Whatson
Original Date: 2017-07-07T17:32:07Z


Wilson, pls take a careful look at the error. It complains on VL_VALUEPLUSARGS_II, not VL_VALUEPLUSARGS_IQ.
I can't verilate my RTL with this error.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2017-07-07T17:36:08Z


Your message said "main.o: In function `VL_VALUEPLUSARGS_IQ".

Regardless, please modify the test_regress/t/t_sys_plusargs.v to show the problem, and I'll fix it.

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Original Redmine Comment
Author Name: Thomas J Whatson
Original Date: 2017-07-07T17:45:15Z


The first error from the ticket description has gone. I'm now talking about another issue, reported in #2.

Okay, will update the plusargs test and be right back soon. Thanks for support

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Original Redmine Comment
Author Name: Thomas J Whatson
Original Date: 2017-07-07T18:02:23Z


I just built verilator_3_906-8-g13f7903. I ran standard tests and they all have passed.

GCC 7.1 complains on line 40 in the main.cpp attached. The issue is in the random seed initialization with the VL_VALUEPLUSARGS_II method.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2017-07-07T18:10:29Z


Oh, so it's your code that's calling it, not verilator. That makes a lot more sense then. VL_ functions occasionally change, and while changes are avoided they do sometimes need to change, so if you're using them you'll need to keep up to date.

Use instead VL_VALUEPLUSARGS_INI(32, "randseed=%d", randomSeed);

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Original Redmine Comment
Author Name: Thomas J Whatson
Original Date: 2017-07-07T18:14:39Z


Thank you! That resolves my problem

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2017-08-29T02:54:01Z


In 3.908.

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