Author Name: Kunal Gulati
Original Redmine Issue: 1300 from https://www.veripool.org

I'm compiling a SystemVerilog module, after I run "verilator --cc bsg_hypotenuse.v --exe" and then "make -j -f Vbsg_hypotenuse.mk Vbsg_hypotenuse" I get the error:
g++ verilated.o Vbsg_hypotenuse__ALL.a Vbsg_hypotenuse__Syms.h /usr/local/share/verilator/include/verilated.h /usr/local/share/verilator/include/verilated_config.h /usr/local/share/verilator/include/verilatedos.h Vbsg_hypotenuse.h -o Vbsg_hypotenuse -lm -lstdc++
Vbsg_hypotenuse__Syms.h:9:23: fatal error: verilated.h: No such file or directory
compilation terminated.
Vbsg_hypotenuse.h:11:23: fatal error: verilated.h: No such file or directory
compilation terminated.
Vbsg_hypotenuse.mk:59: recipe for target 'Vbsg_hypotenuse' failed
make: *** [Vbsg_hypotenuse] Error 1

I'm on Ubuntu 17.10 and have ran "Verilator --V" with the following result:
Verilator 3.922 2018-03-17 rev verilator_3_920-32-gdf3d1a4

Copyright 2003-2018 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify the Verilator internals under the terms of
either the GNU Lesser General Public License Version 3 or the Perl Artistic
License Version 2.0.

See http://www.veripool.org/verilator for documentation

Summary of configuration:
Compiled in defaults if not in environment:
SYSTEMC =
SYSTEMC_ARCH =
SYSTEMC_INCLUDE =
SYSTEMC_LIBDIR =
VERILATOR_ROOT = /usr/local/share/verilator

Environment:
PERL =
SYSTEMC =
SYSTEMC_ARCH =
SYSTEMC_INCLUDE =
SYSTEMC_LIBDIR =
VERILATOR_ROOT =
VERILATOR_BIN =

Please help me out in this regards.

Sincerely,
Kunal Gulati