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Missing # in parameter list crashes verilator with no useful error message #1308

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veripoolbot opened this issue May 9, 2018 · 2 comments
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area: lint Issue involves SystemVerilog lint checking resolution: fixed Closed; fixed

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Author Name: Dan Kirkham
Original Redmine Issue: 1308 from https://www.veripool.org

Original Assignee: Wilson Snyder (@wsnyder)


This syntax error took me a while to figure out because verilator crashes with no useful error output.

//module param_list_no_hash #( // Correct syntax
     FOO=1
) (
     output bar
);

assign bar = FOO;

endmodule

         /usr/local/bin/verilator_bin_dbg -cc module.v --debug
Starting Verilator 3.922 2018-03-17 rev UNKNOWN_REV
- V3Os.cpp:57:        export SYSTEMC_ARCH=cygwin # From sysname 'cygwin_nt-10.0'
- V3File.cpp:205:        --check-times failed: no input obj_dir/Vmodule__verFiles.dat
- V3GraphTest.cpp:356:selfTest:
- V3ParseImp.cpp:97:  parseFile: module
  Preprocessing module.v
- V3PreShell.cpp:137:     Reading module.v
- V3ParseImp.cpp:164: Lexing module.v
%Error: export VERILATOR_ROOT=
%Error: /usr/local/bin/verilator_bin_dbg -cc module.v --debug
%Error: Command Failed /usr/local/bin/verilator_bin_dbg -cc module.v --debug

</pre


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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2018-05-09T22:32:31Z


Thanks for the test case; simple enough to solve.

Fixed in git towards 3.924.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2018-06-13T01:29:06Z


In 3.924.

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Labels
area: lint Issue involves SystemVerilog lint checking resolution: fixed Closed; fixed
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