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$clog2 should be allowed in Verilog 2005 #1319

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veripoolbot opened this issue Jun 8, 2018 · 2 comments
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$clog2 should be allowed in Verilog 2005 #1319

veripoolbot opened this issue Jun 8, 2018 · 2 comments
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resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800

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Author Name: James Hutchinson
Original Redmine Issue: 1319 from https://www.veripool.org

Original Assignee: James Hutchinson

Currently it's only allowed in SystemVerilog 2005 and beyond
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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2018-06-08T12:01:37Z

Agreed, thanks for the good patch.

Fixed in git towards 3.923.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2018-06-13T01:28:51Z

In 3.924.

@veripoolbot veripoolbot added resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800 labels Dec 22, 2019
@wsnyder wsnyder mentioned this issue May 3, 2020
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resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800
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