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Author Name: Ayewin Oung Original Redmine Issue: 1367 from https://www.veripool.org
Understood that, it will suffer in sim speed. It would be good to keep the interface so simulations can be "true". Useful for debug/bring stages.
The text was updated successfully, but these errors were encountered:
Original Redmine Comment Author Name: Wilson Snyder (@wsnyder) Original Date: 2018-11-27T10:05:49Z
--pins-bv 1 might do what you want. See also --pins-sc-biguint.
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Author Name: Ayewin Oung
Original Redmine Issue: 1367 from https://www.veripool.org
Understood that, it will suffer in sim speed. It would be good to keep the interface so simulations can be "true". Useful for debug/bring stages.
The text was updated successfully, but these errors were encountered: