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If we have a SV packed structure with several elements and we try to initialize it as an array list, but the array list is inconsistent (see the code below), the verilator crashes with no useful message.
`include "test_module_pkg.svh"
module test_module
(
input logic sys_clk,
input logic sys_rst_n,
input logic sys_ena,
input test_module_pkg::test_type_t test_in,
output test_module_pkg::test_type_t test_out
);
import test_module_pkg::*;
always_ff @(posedge sys_clk or negedge sys_rst_n) begin
if (~sys_rst_n) begin
test_out <= '{'0, '0, '0};
end
else begin
if(sys_ena) begin
test_out.t1 <= ~test_in.t1;
test_out.t2 <= ~test_in.t2;
test_out.t3 <= ~test_in.t3;
end
else begin
test_out <= '{'0, '0}; /* Inconsistent array list; */
end
end
end
endmodule: test_module
</code>
Author Name: Viktor Tomov
Original Redmine Issue: 1378 from https://www.veripool.org
Original Assignee: Wilson Snyder (@wsnyder)
If we have a SV packed structure with several elements and we try to initialize it as an array list, but the array list is inconsistent (see the code below), the verilator crashes with no useful message.
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