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Support SystemVerilog void casts & warn if not present #1383

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veripoolbot opened this issue Dec 31, 2018 · 3 comments
Closed

Support SystemVerilog void casts & warn if not present #1383

veripoolbot opened this issue Dec 31, 2018 · 3 comments
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resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800

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Author Name: Al Grant
Original Redmine Issue: 1383 from https://www.veripool.org

Original Assignee: Wilson Snyder (@wsnyder)

SystemVerilog supports casts; one use is to explicitly void a non-void function call, to avoid a lint warning:

function automatic integer f_int();
endfunction

function automatic void g();
  void'(f_int());
endfunction

Verilator faults this with

syntax error, unexpected void

It would be useful if Verilator could support this simple idiom, given that functions are generally supported and this kind of voiding cast may be mandated by house style or used in the output of Verilog generators.
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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2019-01-02T23:16:34Z

Should be straight foward enough, perhaps you could provide some test_regress style test cases and a patch to implement it?

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2019-03-10T19:12:37Z

Fixed in git towards 4.012.

Also added IGNOREDRETURN warning when no cast present, which is required by IEEE.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2019-03-24T01:15:55Z

In 4.012.

@veripoolbot veripoolbot added resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800 labels Dec 22, 2019
@wsnyder wsnyder mentioned this issue May 3, 2020
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resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800
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