Author Name: Engr vns
Original Redmine Message: 2842 from https://www.veripool.org

Hi Veripool team,

Question about defining a sorting order for AUTOINPUTS and OUTPUTS.

The current sorting order for AUTOINPUTS and OUTPUTS is -

1. Direction, numerical sorting of portwidths, lexicographical sorting of port name.

Is there a way a user can customize this sorting order.
The motivation is cluster the signals that being to a a bus together.
Here's an example -
Assume that you several AXI buses which are named as - AxiBus1, AxiBus2, AxiBus3.

The individual signals of these buses get auto-sorted by default as -
ARREADY_AxiBus1;
ARREADY_AxiBus2;
ARREADY_AxiBus3;

AWREADY_AxiBus1;
AWREADY_AxiBus2;
AWREADY_AxiBus3;

Instead it would be more meaningful to group them by buses as -
ARREADY_AxiBus1;
AWREADY_AxiBus1;

ARREADY_AxiBus2;
AWREADY_AxiBus2;

ARREADY_AxiBus3;
AWREADY_AxiBus3;

If you assume that the user has no flexibility to modify the names, is there a way to modify the sorting order using regex for verilog portnames.

Thanks,
-VS