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Does anyone know if it’s possible to keep auto-indent working, within custom macros that would delimit the beginning and end of a block in system verilog.
Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2019-08-20T23:41:03Z
There us no current way to do this. The UVM begin/end are similar and so indent properly but are hardcoded in the source. You could make a local veraion with edits if need be.
Author Name: j briquet
Original Redmine Message: 3048 from https://www.veripool.org
Hi all,
Does anyone know if it’s possible to keep auto-indent working, within custom macros that would delimit the beginning and end of a block in system verilog.
‘test_begin(mytest)
$display(“myexample”);
‘test_end
Where :
‘define test_begin(test) module ‘’test; initial begin
‘define test_end end endmodule
Sorry for the back tick, i was using my smartphone when typing this post.
Jean-Pierre
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