module arbiter #(
     parameter VCD_PORT_NUMBER = 3
)
(
     input clk,
     output reg [VCD_PORT_NUMBER-1:0] in_ip2bus_ack,
     output reg [(VCD_PORT_NUMBER*32)-1:0] in_ip2bus_data
);
     always @ (posedge clk)
         begin
             in_ip2bus_ack = 3'b0;
             in_ip2bus_data = 96'b0;
         end
endmodule
</code>

SC_MODULE(Varbiter) {
  public:

     sc_in<bool> clk;
     sc_out<uint32_t> in_ip2bus_ack;
     sc_out<sc_bv<96> > in_ip2bus_data;
...
}   
</code>