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Issue #1503

[VerilogAMS]: Unknown Language Specified

Added by Rohit Yadav 12 days ago. Updated 10 days ago.

Status:
WillNotFix
Priority:
Normal
Assignee:
Category:
Unsupported
% Done:

0%

Estimated time:
0.00 h

Description

Hi,

I am new to Verilator. I am interested in simulating several verilogams test cases with Verilator. I ran the following command to a simple vams file but Verilator fails with the following log:

#+begin_src bash
# Run command
verilator -Wall --language VAMS --cc DAC6.vams
# Error log
%Error: Unknown language specified: VAMS
%Error: Command Failed /nix/store/44qhhq29xqi8f3h6n1pmjnlzgpagwy4z-verilator-4.016/bin/verilator_bin -Wall --language VAMS --cc DAC6.vams
make: *** [Makefile:2: default] Error 10
#+end_src

#+begin_src vams :filename DAC6.vams
`include "disciplines.vams" 
module DAC6 (Din,Aout, Vdd,Vss);
input [5:0] Din; // digital input bus
output Aout; // analog output
input Vdd,Vss; // reference supply for output
electrical Aout,Vdd,Vss;
parameter real tr=10n; // (sec) risetime for output changes
parameter real rout=1k; // (ohms) output resistance
real kout; // output as fraction of supply
real vout; // continuous analog output voltage
always begin
 if (^Din === 1âbx) kout=0; // if any bits invalid in Din, output is zero
 else kout = Din/63.0; // else compute scale factor for output
 @(Din); // repeat whenever Din changes
end
analog begin
 vout = V(Vdd,Vss)*transition(kout,0,tr,tr); // ramp to fraction of supply
 I(Aout,Vss) <+ (V(Aout,Vss)-vout)/rout; // drive output
voltage+resistance
end
endmodule
#+end_src

Standard verilog seems to be work fine but not vams.

I apologize if this has been answered before. I tried searching through the issues history but could not find any related to this.

Regards, Rohit

DAC6.vams - Verilogams file (783 Bytes) Rohit Yadav, 09/10/2019 01:58 AM

Makefile - Makefile (57 Bytes) Rohit Yadav, 09/10/2019 01:58 AM

History

#1 Updated by Rohit Yadav 12 days ago

#2 Updated by Wilson Snyder 10 days ago

  • Description updated (diff)
  • Status changed from New to WillNotFix

Verilator supports almost no AMS, basically wreal and one or two functions, and this is unlikely to be improved even in the long term, sorry. See the manual for details.

#3 Updated by Rohit Yadav 10 days ago

Thanks for the response. I apologize, since it was mentioned in the options, I thought may be it is supported, although it was listed that it will support very limited VAMS. Thanks again for looking into my issue.

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